Hello everyone,

I am trying to simulate on Proteus software a frequency synthesizer using a CD4046 PLL and a DM74LS90 decade/binary counter. The input signal is just a pulse generator that works as a clock on my main project. I have seen a model online using the PLL LM565, however there is no simulation model for him on Proteus. Any help will be very much helpful!

Thanks,

Gabriel.

 

It is probable that the oscillator output from the CD4046 is not enough t drive an 74LS90. If you simply need to divide by 4 I suggest using both sections of a CMOS CD4013 dual "D" type flipflop. connected as a two stage divider.

 

Thanks for your answer! I needed to divide it by 4 so I can have the PLL multiply my input frequency by 4. I want to input an 8kHz signal and get a 32kHz signal!

 

Make that a CD4013B to assure that you are getting enough drive.