I'm making a clock generator, I want to know what are the other parameters that make a clock generator better like rise and fall time, slew rate, duty cycle etc. What are the other parameters that is useful and how can I compute it?

I'm doing a simulation in TSMC65nm.

Thanks

 

Jitter, drift short and long term, spectral purity, noise.

Regards, Dana.

 

Faster is not always better – remember the tortoise and the hare.

You might think that developing a clock signal with a very fast rise time would be good/better; but I offer you this real world cautionary tale.

Many years ago, a digital integrated circuit used within a product manufactured by my employer became obsolete. The reason for its obsolescence was that the manufacturer had developed a faster device, capable of operating at an increased frequency.

This was no problem because the new device would still function within the product, but fed with a clock speed much slower than the device was capable of handling – so all well and good.

However as part of the regular production EMC compliance testing – it was found that the product failed the rf emission limits. Investigation showed the failure to be due to the faster rise times of signals from the new integrated circuit (which were required by the IC to operate at the increased frequency).