hi i am doing a mod-60 with start/stop and reset button... everything works except when the counter counts up to 59 and reset to 00 , it stopped there and wait for another input.
how should i modify my design so it will continue to loop ?

start/stop button = pause the input
reset button=clear to 00 and maintain there

thanks in adv

 

This looks identical to a problem that was recently posted.

Without looking at your circuit, I can probably tell what your problem is.

Your reset button says that it should make the circuit "clear to 00 and maintain there". That's a bit ambiguous. Do you mean that it should stay at 00 only as long as the reset button is pressed, or do you mean that it should stay at 00, even after the reset button is released, until the start/stop button is pressed?

Answer that question and then we can proceed.

Also, should the start/stop button only pause the counter while the button is being pressed, or until the button is pressed again. Furthermore, you say that it should "pause the input". What input. Your circuit appears to have two inputs -- start/stop and reset -- which of these inputs is being "paused" and what does it even mean for one of them to be "paused". You are not pausing the input, you are pausing the counter.

Engineering is a very precise field and you need to get in the habit of being very precise in your descriptions of things because if you don't have a precise understanding what what something should do, it is virtually impossible to design something that will do it.

 

Oh ok im sorry abt that...
What i am referring was when the reset button is pressed and released, the counter will be cleared to the 00 and stay there until start/stop is pressed.

For the Start/Stop button, the counter will pause when the button is being pressed once and it will resume counting again when the button is pressed again


thanks for the advice , i'm still new in this field

The only problem is that the counter stops counting up after it completed 1 cycle.

 

So let's think about this.

Say the counter is in State 00. Should it count or not? You can only answer this if you know whether it got into State 00 because the reset was pressed or because the it overflowed from State 59? Well, if you need to know this additional information in order to determine if the counter should proceed to State 01, then the counter also needs this additional information. Is your circuit capturing that information so that it is available at the time that the counter is making its decision about whether to count up or stay where it is?

This is a bad design for a number of reasons, most of which your simulator may not be able to detect. When you press a pushbutton switch, you normally get "switch bounce" meaning that the switch will produce a number of pulses each time it is activated. Your simulator is almost certainly producing a nice, clear, single pulse per activation. But if you were to actually build this circuit, it was behave very erratically as a consequence of bounce. The other problem that you have in many places is that you are using gates logic to produce signals that go to edge-triggered clock inputs and asynchronous reset inputs. This means that any glitches on those signals the occur as a result of the inputs into the logic that produces them not happening exactly at the same time will be acted upon by those clock and reset inputs. Again, if you were to actually build this circuit this issue would almost certainly raise its ugly head. If you read the 74xx93 datasheet you will discover that it explicitly states that the Q outputs to NOT change simultaneously and that decoded outputs should NOT be used for clocks or strobes.

Is there a specific reason why you are using a 74xx93?

 

This is a lab assignment issued from sch and only 74ls93 and other standard logic logic gates was issued to us, which include AND, NAND and OR gates.
Basically my friends are all stuck in this particular problem and our lecturer is unable to help us with due to it being a project with marks awarded.

We are required to build it on a breadboard too.

I have found a link which contain the assignment i am doing at the moment and the answer he shown also have the same problem as i am ( i tried his design on my multisim)

http://tohchanghian.blogspot.sg/2012/02/et1004-digital-electronics-ii-et1004.html

How would u design the start/stop button then?

 

The first thing you need to do is identify your basic states and then what events cause transitions between those states and what happens during those transitions.

If you had to pick one word for a descriptor and then define two states for your counter based on (descriptor) and (not descriptor), what would that word be. For example, if I were designing a machine that turned on a light, I might choose the word "glowing" for my descriptor so that my two states were (glowing) and (not glowing).

 

Hello Mystic88

About Start-Stop button:
(Should rather be called Start-Pause)

I quite understand that, once started the counter, it should continue counting from 0 to 59 cyclically until you press the Start-Stop.
where:
If It Were counting, it stops,
If It Were In Stop, then continue counting.
(Change the words Stop by Pause, will be better understood.)

Now,
The button called Reset is supposed to bring to zero the counter.

Looking at your diagram we can notice that the Start-Stop button changes the state of Qa in U2. This Qa reaches the NAND gate U1,
So:
If Qa is high, the pulses generated by V1 "cross" this NAND Gate U1 which reach the 74LS93 U5 for his entry called INA. So the counter U5 start counting.

But if Qa is low, the pulses generated by V1 Do not "cross" this NAND gate U1 so the counter (74LS93 U5) will stop counting.

Let me call this counter 74LS93 U5 as "The units counter"
This counter performs two functions:
1 - when reaches 9, the next pulse is changed to 0 so that it makes a decimal counter.
2 - this also generates the pulse count +1 for U2 74LS93 which is the counter of the tens.

1 - how this is done?
First of all we need to analyze the inputs calls: R01 and R02 of the counters U2 and U5. Signal reaches them by the NAND gates: U7 and U9 respectively.

When the counter U5 Reaches the count: A (Hex), 10 (Dec), 1010 (Binary), both inputs of the NAND gate U8 Will Have a high level which will give us, at its output, low. This low level reach one input of the NAND gate U9 which will give us a high level on its output,
This high level Reaches U5, by it's inputs, namely: R01 and R02 resetting it to 0.
So, this counter will only count from 0 to 9.

2- The counter U2, we might call "the tens counter", has its entry called: INB to the output of U5 Qd, this "tens counter" will count +1 each time the counter U5 is in 9 +1.

As soon as U2 reaches 6 (Dec), 110 (Binary) the two inputs of the NAND gate U6 will have a high level with its output will have a low level.
This low level reaches the NAND gate U7 resulting in a high output resetting to 0 the counter U2.

Because U2 is reset to 0 when it reaches 6 (Dec), 110 (Binary), Qa is also reset to 0, thus inhibiting the pulses that "crossed" by the NAND gate U1. which went to the counter U5.
So the counter does not count more. This stops.

I understand that you want the counter to continue counting cyclically from 0 to 59. Well, here is the reason that stops counting cyclically.

It should be noted that the counter U2 has displaced its outputs Qa, Qb, Qc and Qd.
While Qa and INA, are used in the circuitry of the start-stop button, Qb, Qc and Qd are used to counter the tens.
good trick, I had imagined myself.

The link you attached does not say that this counter should be cyclical.
http://tohchanghian.blogspot.sg/2012...ii-et1004.html
At least after I read it, I could not find where it should be said cyclic.

sorry for so many words.