MECHATRONICS question!

Discussion in 'Power Electronics' started by MaxHeadRoom, Nov 27, 2017.

  1. MaxHeadRoom

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    Jul 18, 2013
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    Anyone done any motor control design using Roman's methods here https://www.romanblack.com/onesec/DCmotor_xtal.htm
    I am toying with the idea of variable control, but have to convert his program to Assembly if possible.
    (was a forum member The_RB).
    Max.
     
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  2. AlbertHall

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    It is certainly possible and doesn't even look very difficult.

    I haven't tried this method of motor control but it certainly looks impressive. It won't give an increase in torque like gearing would but still...
     
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  3. MaxHeadRoom

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    It should increase the torque with load though, if it operates per the description.
    I am just figuring the easiest way to convert, most is fairly obvious, but some of the C operations I am not familiar with.
    Max.
     
  4. AlbertHall

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    Such as?
     
  5. MaxHeadRoom

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    I will pore over it a bit, if I get stuck I will come back for advice.;)
    Too bad Roman is not around any more!:(
    Max.
     
  6. AlbertHall

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    Indeed, he is very good at generating this kind of algorithm. I have used his accurate one second timer from any crystal frequency.
     
  7. MaxHeadRoom

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    Unfortunately I am thinking the operative word is 'Was' very good, as he dissapeared from sight around 2013 on all forums he contributed to.
    Max.
     
  8. AlbertHall

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    Yes, agreed on unfortunately, but the algorithms are still good.
     
  9. MaxHeadRoom

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    What is the method/switch used in XC8 for displaying the assembly code version of a C file? If any.
    Max.
     
  10. AlbertHall

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    Build for debugging, then from the menu, window, debugging, disassembly.
    If you are using the free XC8 then it won't make much sense as it will have deliberate 'extras' in to make the paid version optimisations seem better :rolleyes:
     
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  11. MaxHeadRoom

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    What would the assembly version of this be?
    Max.

    Code (C):
    1. ;  2. updates reference freq generator, records its position
    2.   bres += 102400;                 ; add nS per interrupt period (512 insts * 200nS)
    3.   if(bres >= MOTOR_PULSE_PERIOD)  ; if reached a new reference step
    4.   {
    5.     bres -= MOTOR_PULSE_PERIOD;
    6.     rpos++;                       ; record new xtal-locked reference position
    7.   }
     
  12. AlbertHall

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    For which processor? PIC and X86 would be very different.
     
  13. MaxHeadRoom

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    It is a 16f628a Picmicro.
    Max.
     
  14. AlbertHall

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    How were bres and rpos declared?
    Need to know how many bits they use.
     
  15. MaxHeadRoom

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    unsigned long bres; // bresenham accumulator used to make ref frequency
    unsigned char rpos; // reference position of xtal based freq
    Thanks
    Max.
     
  16. AlbertHall

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    This is what XC8 (free version) produces and it is virtually incomprehensible. The compiler has optimised out rpos and reused one of my variables, Parity, instead (I put this code in a program I am working on at the moment). Notice the code at 0x260 and 0x 261 which just wastes time. There will be lots more like that in there if you care to analyse it. I think it would be much easier to do it from scratch.
    [EDIT] I just noticed that it has also used my Temp variable!

    Code (ASM):
    1.  
    2. !    unsigned long bres=0;
    3. 0x20F: MOVLW 0x0
    4. 0x210: BSF STATUS, 0x5
    5. 0x211: BCF STATUS, 0x6
    6. 0x212: MOVWF 0x4A
    7. 0x213: MOVLW 0x0
    8. 0x214: MOVWF 0x49
    9. 0x215: MOVLW 0x0
    10. 0x216: MOVWF 0x48
    11. 0x217: MOVLW 0x0
    12. 0x218: MOVWF Temp
    13. !    unsigned char rpos=0;
    14. 0x219: CLRF Parity
    15. !    const unsigned long MOTOR_PULSE_PERIOD = 100;
    16. !  
    17. !    //  2. updates reference freq generator, records its position
    18. !  bres += 102400;                 //; add nS per interrupt period (512 insts * 200nS)
    19. 0x21A: MOVLW 0x0
    20. 0x21B: ADDWF Temp, F
    21. 0x21C: MOVLW 0x90
    22. 0x21D: BTFSC STATUS, 0x0
    23. 0x21E: MOVLW 0x91
    24. 0x21F: ADDWF 0x48, F
    25. 0x220: MOVLW 0x1
    26. 0x221: BTFSC STATUS, 0x0
    27. 0x222: MOVLW 0x2
    28. 0x223: ADDWF 0x49, F
    29. 0x224: MOVLW 0x0
    30. 0x225: BTFSC STATUS, 0x0
    31. 0x226: MOVLW 0x1
    32. 0x227: ADDWF 0x4A, F
    33. !  if(bres >= MOTOR_PULSE_PERIOD)  //; if reached a new reference step
    34. 0x228: MOVLW 0x1
    35. 0x229: MOVWF FSR
    36. 0x22A: CALL 0x42B
    37. 0x22B: MOVWF 0x42
    38. 0x22C: CALL 0x42B
    39. 0x22D: MOVWF 0x43
    40. 0x22E: CALL 0x42B
    41. 0x22F: MOVWF 0x44
    42. 0x230: CALL 0x42B
    43. 0x231: MOVWF 0x45
    44. 0x232: MOVF 0x45, W
    45. 0x233: SUBWF 0x4A, W
    46. 0x234: BTFSS STATUS, 0x2
    47. 0x235: GOTO 0x240
    48. 0x236: MOVF 0x44, W
    49. 0x237: SUBWF 0x49, W
    50. 0x238: BTFSS STATUS, 0x2
    51. 0x239: GOTO 0x240
    52. 0x23A: MOVF 0x43, W
    53. 0x23B: SUBWF 0x48, W
    54. 0x23C: BTFSS STATUS, 0x2
    55. 0x23D: GOTO 0x240
    56. 0x23E: MOVF 0x42, W
    57. 0x23F: SUBWF Temp, W
    58. 0x240: BTFSS STATUS, 0x0
    59. 0x241: GOTO 0x264
    60. !  {
    61. !    bres -= MOTOR_PULSE_PERIOD;
    62. 0x242: MOVLW 0x1
    63. 0x243: MOVWF FSR
    64. 0x244: CALL 0x42B
    65. 0x245: MOVWF 0x42
    66. 0x246: CALL 0x42B
    67. 0x247: MOVWF 0x43
    68. 0x248: CALL 0x42B
    69. 0x249: MOVWF 0x44
    70. 0x24A: CALL 0x42B
    71. 0x24B: MOVWF 0x45
    72. 0x24C: MOVF 0x42, W
    73. 0x24D: SUBWF Temp, F
    74. 0x24E: MOVF 0x43, W
    75. 0x24F: BTFSS STATUS, 0x0
    76. 0x250: INCFSZ 0x43, W
    77. 0x251: GOTO 0x253
    78. 0x252: GOTO 0x254
    79. 0x253: SUBWF 0x48, F
    80. 0x254: MOVF 0x44, W
    81. 0x255: BTFSS STATUS, 0x0
    82. 0x256: INCFSZ 0x44, W
    83. 0x257: GOTO 0x259
    84. 0x258: GOTO 0x25A
    85. 0x259: SUBWF 0x49, F
    86. 0x25A: MOVF 0x45, W
    87. 0x25B: BTFSS STATUS, 0x0
    88. 0x25C: INCFSZ 0x45, W
    89. 0x25D: GOTO 0x25F
    90. 0x25E: GOTO 0x260
    91. 0x25F: SUBWF 0x4A, F
    92. !    rpos++;                       //; record new xtal-locked reference position
    93. 0x260: MOVLW 0x1
    94. 0x261: MOVWF 0x42
    95. 0x262: MOVF 0x42, W
    96. 0x263: ADDWF Parity, F
    97. !  }
    98.  
     
  17. MaxHeadRoom

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    Thanks, I believe I will have to rethink the approach.!
    Max.
     
  18. MaxHeadRoom

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    Are instructions such as this, specific to a particular compiler?
    Max.
     
  19. xox

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    The instructions target a specific CPU, but the human-readable format depends on the assembler being used by that particular compiler (which is also free to compile directly to machine code, but that's pretty rare).

    The snippet you posted could be written in far less lines of assembler, by the way. Feel free to ask if you need a hand trimming it down a bit. :)
     
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  20. AlbertHall

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    It would be far shorter if it was produced by the paid for version of XC8 but it would still be pretty impenetrable because it wouldn't use the symbols from the C code.
     
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