In which case LVCMOS totem-pole output needs (internal or external) pull-up/down resistor?

Usually, totem-pole type I/O has (internal or external) pull-up/down resistor only when it's an input pin. But, I know for some time it has pull-up/down resistor even when it's an output pin.

Why is that?

 

What part number?

 

If you look closely at the schematic for a CMOS output you will see that actual resistors are uncommon. What you will see is a FET configured as a resistor. Is that what you are talking about? Give us a part number or a chip schematic.

 

TI TMS320TCI6608 device. EMIF16 output pins. For example, EMIFOE_L (output enable) is Hi-Z output LVCMOS type. It has internal pull-up of 1uA. I think this LVCMOS output has the "active" pull-up but at default it's Hi-Z state, so internal pull-up is required. At run-time, the output has two pull-up at the same time, one is "active", the other is "passive." What kind of effect does the internal "passive" pull-up have?

http://www.ti.com/lit/ds/sprs623d/sprs623d.pdf

 

Plus, I want to connect this TI DSP's EMIF16 to Xilinx Kintex-7 1.8V LVCMOS. If I want to add an external pull-up resistor to the EMIFOE_L net, how big is the resistor to be? I also want to know the way of calculation of external pull-up resistor.


http://www.xilinx.com/support/documentation/data_sheets/ds182_Kintex_7_Data_Sheet.pdf

 

If it has the option to produce a Hi-Z output, then it is not a true totem pole output. The totem pole legs can be disabled (usually by means of series FETs in both the upper and lower legs) and so then you would need a pullup/pulldown in order to establish the state (or have the design such that exactly one output connected to the node is actively driving it at all times).