Lowering noise for voltage measurement

Thread Starter

Florian Chavagnat

Joined Jul 17, 2018

I come here with a problem for which I would like an external opinion. I would like to measure the voltage across a resistor facing a variable current (5-10ms sawtooth-shaped pulse with a typical slew rate of 10A/ms giving a voltage up to 50V). For that purpose, I need essentially a simple voltage divider before the signal being read by a data aquisition system.
Some contraints:
- the internal noise of the voltage divider part should be minimized. No filter is wanted to avoid alterating the noise/fluctuation of the power supply (a digital filter may still be applied at the end).
- the current draw from the power loop should be minimized.
Using a simple voltage divider leads to a dilemma: high resistance divider consumes less current but is more noisy and vice versa.

I think of solving this problem using buffer op-amps to separate the voltage divider and the power loop (schematic attached). No current is drawn from the power loop due to the high impedance but low resistance can be used after the op-amps. The bet is that the noise reduction by lowering the resistors values is superior to the noise added by using the op-amps. LM675 op-amp is foreseen since it allows high supply voltage and high output current (up to 3A)

What do you think about this idea? Do you see another way?

Thank you,



Joined Jun 4, 2014
The LM675 is not going to be stable for the unity gain circuit in your diagram. It is stable for gains of 10 or more.
See figures 12 and 13 for the circuits to get stability and unity gain.