I'm having some troubles getting rid of an annoying offset, therefore I need your help!
The power rails are +-12V and I am feeding 0 to 500uA to an LM13700 OTA (U5.2) in this configuration:
***edit: I wrote 0 to 500mA instead of 500uA

Even when there is no input signal at the non inverting input, i get an offset at the output (pin 12 of U5.2) that swings between 0 and around -400mv depending on the amount of the Iabc current.
And when the signal passes through the non inverting input, it get summed to it and everything is shifted down.
This is quite annoying for my application and I’m trying to get rid of it but I’m having some issues understanding why this is happening.
Do you know why this offset is there?
The following doesn't have offset at the output but is not a solution since it doesn't remove it at the source, but it just cut it out at the price of an extra OPAMP and it doesn't look too nice to me.

Any help appreciated!
The power rails are +-12V and I am feeding 0 to 500uA to an LM13700 OTA (U5.2) in this configuration:
***edit: I wrote 0 to 500mA instead of 500uA

Even when there is no input signal at the non inverting input, i get an offset at the output (pin 12 of U5.2) that swings between 0 and around -400mv depending on the amount of the Iabc current.
And when the signal passes through the non inverting input, it get summed to it and everything is shifted down.
This is quite annoying for my application and I’m trying to get rid of it but I’m having some issues understanding why this is happening.
Do you know why this offset is there?
The following doesn't have offset at the output but is not a solution since it doesn't remove it at the source, but it just cut it out at the price of an extra OPAMP and it doesn't look too nice to me.

Any help appreciated!
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