Hi ,can enyone tell me how to multiplex 3 RST 7.5 interrupts on 8085 ,from 3 diffrent D Flip-Flops ??

 

Sure. You combine either the three Q or three Q bar outputs with a gate whose output drives the RST7.5 pin. I don't remember if RST7.5 is active high, active low, or edge sensitive. When you service the interrupt you have to look at each of the flip-flops to determine the source. You must also guarantee that the interrupt flip-flops are ALL clear before you exit the interrupt service routine, otherwise you'll be spending a lot of time there.

Checked my datasheet and RST7.5 is rising edge sensitive. Are you sure you want to drive it with flip-flops?

 

@Papabravo: Why would you not want to use flip flops? You have a little issue on exit that you must check to see if the others need to be serviced, but that is not unusual in multiplex environments. My old ('85 Intel) data book is in a box somewhere, but isn't there a note about ret opcode and rst trigger reset? Anyway is that why you asked about using the flip-flops?

You got me curious.

 

No that was not the reason. Because RST7.5 is rising edge sensitive you may need to do either one or two things to arm the flip-flops for the next interrupt. That is the primary reason. With a level sensitive interrupt all you need to do prior to exiting the ISR is to get the input to the inactive state.

 

Ok, I had remembered an issue exiting the interrupt routine on edge sensitive where the input signal could be set following read, but prior to exit and arming the RST where it would miss the rising edge. I thought there was an ap note about that issue. But agreed, a level sense INT would be a much better choice for all of these reasons.

 

The app note on RST7.5 that I remember suggests making the RST7.5 input a short negative going pulse so that the rising edge is actually the trailing edge of the pulse and you are assured that the input returns to the high state by the time the ISR is entered.