I am using XC8 compiler and when i try to implement inline assembly it gives error like syntax error. i was using
#asm
movwf,1
#endasm

likethis .

 

I am using XC8 compiler and when i try to implement inline assembly it gives error like syntax error. i was using
#asm
movwf,1
#endasm

likethis .

And what error do you get? As a hint check your command format are you sure movwf,1 is an assembler instruction that is valid

 

main.c:51: error: syntax error

and my code is

/* 
 * File:   main.c
 *
 *
 * Created on April 4, 2014, 4:31 PM
 */
#include<xc.h>
// CONFIG1L
#pragma config PLLDIV = 5       // PLL Prescaler Selection bits (Divide by 5 (20 MHz oscillator input))
#pragma config CPUDIV = OSC1_PLL2// System Clock Postscaler Selection bits ([Primary Oscillator Src: /1][96 MHz PLL Src: /2])
#pragma config USBDIV = 2       // USB Clock Selection bit (used in Full-Speed USB mode only; UCFG:FSEN = 1) (USB clock source comes from the 96 MHz PLL divided by 2)

// CONFIG1H
#pragma config FOSC = HSPLL_HS  // Oscillator Selection bits (HS oscillator, PLL enabled (HSPLL))
#pragma config FCMEN = ON       // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor enabled)
#pragma config IESO = ON        // Internal/External Oscillator Switchover bit (Oscillator Switchover mode enabled)

// CONFIG2L
#pragma config PWRT = OFF       // Power-up Timer Enable bit (PWRT disabled)
#pragma config BOR = SOFT       // Brown-out Reset Enable bits (Brown-out Reset enabled and controlled by software (SBOREN is enabled))
#pragma config BORV = 2         // Brown-out Reset Voltage bits ()
#pragma config VREGEN = ON      // USB Voltage Regulator Enable bit (USB voltage regulator enabled)

// CONFIG2H
#pragma config WDT = OFF        // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
#pragma config WDTPS = 32768    // Watchdog Timer Postscale Select bits (1:32768)

// CONFIG3H
#pragma config CCP2MX = ON      // CCP2 MUX bit (CCP2 input/output is multiplexed with RC1)
#pragma config PBADEN = OFF     // PORTB A/D Enable bit (PORTB<4:0> pins are configured as digital I/O on Reset)
#pragma config LPT1OSC = OFF    // Low-Power Timer 1 Oscillator Enable bit (Timer1 configured for higher power operation)
#pragma config MCLRE = ON       // MCLR Pin Enable bit (MCLR pin enabled; RE3 input pin disabled)

// CONFIG4L
#pragma config DEBUG = 1
#pragma config STVREN = ON      // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
#pragma config LVP = OFF        // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)
#pragma config ICPRT = OFF      // Dedicated In-Circuit Debug/Programming Port (ICPORT) Enable bit (ICPORT disabled)
#pragma config XINST = OFF      // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))

#define _XTAL_FREQ 48000000

void init_pwm(void);


void main(void) {
    init_pwm();

#asm
    movwf,1
#endasm
    while(1);
}

void init_pwm(void)
{
    TRISC = 0x00;
    CCP2CON = 0x0C;
    T2CON = 0x00;
    PR2 = 0x44;         // frequency
    CCPR2L = 0x0F;
    TMR2 = 0x00;
    TMR2ON = 1;
}

 

Shouldn't it be

MOVWF 1

without a comma?

 

Shouldn't it be

MOVWF 1

without a comma?

You are onto something here Embic! Every PIC controller datasheet have a assembler command section with examples for every instruction. Use this documentation to get it correct. Also an important thing to remember is that then you enter an assembler section. You must ensure you are set to use the correct memory bank. For this you can use the BANKSEL directive. This is explained in the manual in the "MIXING C AND ASSEMBLY CODE" section

 

Quote:Originally Posted by John P

You are onto something here Embic!

It is incidents like this that have left me a poor man.

 

Shouldn't it be

MOVWF 1

without a comma?

Not to be overly pendantic about it but when the OP fixes the comma problem, he will be writing an unknown value to 001h in RAM. On an 18F, this is access RAM, on enhanced midrange, it writes an indeterminate value to an indeterminate location (*FSR1), On midrange and baseline, it clobbers TMR0.

As John P and to6afre wisely suggest, its time to get up to speed on the instruction set, memory organization and what resources are reserved by the compiler before using #asm.

 

Thank you and sorry for silly mistake bcoz i have seen it after many days and mostly works on C so..