Hello,
So I'd like to use an ADC with a differential input (I haven't selected the exact chip yet as I'm in the planning phase.) I'm measuring between GND and 125mV. The advantage of using a differential current drive is increased signal integrity and better frequency response (target is 20MHz BW).

My problem is all the ADCs I look at specify a voltage range which they go up or down to with respect to VCM. I tried searching online, but I cannot find anything about how to connect these current feedback op-amps into an ADC. I did find this nice article entitled High Speed Differential ADC Driver Design Considerations, but it doesn't really say how current feedback amps connect to ADCs.

How would you connect current feedback differential op-amp to an ADC?

Thanks!

 

I have used LMH6550 op amp and ADS807 ADC.

 

You might consider a differential output op amp which is designed to feed a differential input ADC with the CM voltage output adjustable.
Discussion here.
Examples here.

 

I have used LMH6550 op amp and ADS807 ADC.

So normally ADCs specify at what rate they sample, like in ksps, msps, or gsps.

The ADC you linked just says, "53MHz Sampling" so does that mean that it samples at 53msps or that it samples at 106, 159, 212, or 265msps. I ask because you'd normally want to sample at 3-50x the BW that you want to observe. Or at least that's what I've read.

 

You might consider a differential output op amp which is designed to feed a differential input ADC with the CM voltage output adjustable.
Discussion here.
Examples here.

I think you got your links mixed up. The "Examples" link goes to ti.com's "fully differential amplifiers" product selection page. If you just meant to like example products, that's fine, but normally example's of how to implement circuits are, well, circuits.

The "Discussion" link goes to a TI datasheet whitepaper (EDIT: I typed wrong word 2x). Whitepapers Datasheets are good, but it doesn't look like a discussion, but a whitepaper or guide. If that's what you call a discussion, I'm fine with that, but I think of a discussion in terms of what were posting here. A back-and-forth between people.

Again, if I misunderstood, thanks for the links. I'll be looking at them in either case.

 

So normally ADCs specify at what rate they sample, like in ksps, msps, or gsps.

The ADC you linked just says, "53MHz Sampling" so does that mean that it samples at 53msps or that it samples at 106, 159, 212, or 265msps. I ask because you'd normally want to sample at 3-50x the BW that you want to observe. Or at least that's what I've read.

The ADC can sample at a maximum rate of 53 MS/s.
Hence you can sample at any rate fs from 0 Hz to 53 MHz.
The maximum signal frequency you can analyze is fs/2.
Thus, if fs is 40 MHz, the highest frequency allowed in the signal is 20 MHz.
25 MHz signal will alias to 15 MHz.
35 MHz becomes 5 MHz.
40 MHz becomes 0 Hz.

 

I think you got your links mixed up.

Nope.

normally example's of how to implement circuits are, well, circuits

Okay Mr. Pedantic.
The link goes to examples of differential output ICs.
Are they not circuits?
But I never said specifically that the link was to application circuits.

The "Discussion" link goes to a TI datasheet.

No.
The link goes to a Application Report whose subject is "Fully Differential Amplifiers".

 

So normally ADCs specify at what rate they sample, like in ksps, msps, or gsps.

The ADC you linked just says, "53MHz Sampling" so does that mean that it samples at 53msps or that it samples at 106, 159, 212, or 265msps. I ask because you'd normally want to sample at 3-50x the BW that you want to observe. Or at least that's what I've read.

sampling rate is quoted for ADCs
the other important number is input bandwidth,
so an ADC which is rated for 125 Mhz sample clock, cpuld have an input bw of 500 Mhz , and is used for sub sampling.

For an Adc, you need to look at sampling rate and which nyquest zone you want to sample , you then need to ensure you filter out input signals outside that nyquest zone.

This filtering is the basis of tye often repeated mantra of over sampling.
an adc sampling a X Mhz, can sample reliably a max bandwidth of X/2 Mhz. the nyquist limit.

The filtering requirments are very tough with X/2, so with X/3 filtering is easier.

50 X sampling, woukd make filtering easy , but require a very expenc8ve adc compared to tye slower 3x option.

these guys have great info and adc / drivers parts.
https://www.analog.com/en/product-category/analog-to-digital-converters.html