i need to implement a sequential circuit that has two outputs
the first recognizes 1,4,5,9
the second one recognizes 12,13,14,15
i need build this one using a PROM and a shift register

 

I would use boolean algrebra, may be too big for a Karnaugh Map. I looks like they want you to access a memory 4 bytes at a time, then return a T if they match 1, 4, 5, and 9 and true if they match the other 4; and use an arrangement of logic gates to do this. The shift reg is probably needed to increment the address bus. Are you allowed to use more than one?