How to improve the efficiency of the Class-E DC-DC converter circuit

Thread Starter

uhdam

Joined Jan 24, 2013
23
Hello,

I am working on the Class-E DC-DC converter circuit. The efficiency of the circuit is 91% when the circuit simulates with ideal transformer and the 40% efficiency yielding when the circuit simulates with the practical transformer.

How to improve the efficiency of the circuit with practical transformer.

Here, I am attaching the circuit simulations and waveforms.
 

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Thread Starter

uhdam

Joined Jan 24, 2013
23
Hello
Reduce the series resistance in the primary and secondary.
The results which I have showed above are from the simulation with ideal and practical transformer.

Actually, the primary and secondary resistances are the practical transformer resistances. I can reduce and I can do what ever I want in the simulations in order to get the high efficiency. But, while come to the Hardware Board (PCB) we can't do any thing because the resistance (primary & secondary) of the transformer is already exists. So, according that we have to design the circuit in the simulation than only we will get the efficiency nearly same in both simulation and hardware board.

One more thing is that,
The circuit running with Zero Voltage Switching (ZVS) which means that the circuits operates under the soft-switching. So, there is no switching losses.
Why the circuit is not yielding the high efficiency?
How to reduce the input current? Because, I am getting the outs are Vout=17V, Iout=1.2A,Iin=0.900A and Vin is 60V. If I reduce the input current to 0.350A or 0.400A then I will get the high efficiency.
 

crutschow

Joined Mar 14, 2008
25,269
If you reduce the transformer resistances in the simulation does the efficiency go up?
If so then the efficiency is limited by the transformer resistances.
 

DickCappels

Joined Aug 21, 2008
6,535
There might be a few things missing from the model. A winding close to a core at 5 MHz will have losses because of eddy currents in the wire and some skin effect. There would also be Hysteresis losses and possibly significant eddy current losses in the core.
 

Thread Starter

uhdam

Joined Jan 24, 2013
23
Hello DickCappels,

According to my circuit, How do I caluculate the primary and secondary resistances of the transformer in the copper losses?
 

RamaD

Joined Dec 4, 2009
328
My guess is that the problem could be the way power has been calculated.
Are the powers calculated by Vrms X Irms in both the input and outputs?
Power need to be calculated as Average(V(t) * I(t)). Then the efficiency could be higher!
 

DickCappels

Joined Aug 21, 2008
6,535
Resistance of a winding is the resistance per unit length times the length of the wire in the winding. The length is usually calculated based on the mean winding length for the bobbin, assuming the bobbin is filled.

In the end, winding resistance is traded off against other factors to arrive at a compromise that is the design of the transformer.
 

ronv

Joined Nov 12, 2008
3,770
Hello RamaD,

I am not understand what you mean. If you don't mine can you calculate my values in your way which you mentioned in the above post.

and also,
The DC values are calculated in RMS/cycle or Mean/cycle? and what about AC values?
I don't get quite the same numbers with LTSpice (but close). The big problem is with switching losses in the FET because of the very high frequency. Check it with your simulator.
Why are you trying to do it this way? Just for the education?
 

RamaD

Joined Dec 4, 2009
328
Hello RamaD,

I am not understand what you mean. If you don't mine can you calculate my values in your way which you mentioned in the above post.

and also,
The DC values are calculated in RMS/cycle or Mean/cycle? and what about AC values?
There isnt any my way! I was just mentioning that Power is not Vrms X Irms under all conditions. Just for example, in a buck regulator, while calculating the input power, when the switch is off, the input voltage during the off period will still contribute to the Vrms. But there is no power drawn during that period. Vrms * Irms in this case would actually be higher than what it really is. So the power should be calculated from the instantaneous power. (1/T) Integral V(t).I(t).dt within the limits. Maybe, I am sounding complex, but is just the basics.

You could plot the power, ie., V(t)*I(t) and take the average value instead of rms. Then calculate the efficiency. I was not familiar with the simulation software you used, but after having a better look at the waveforms, this is probably not the cause.
After all, if the efficiency is low, it is one or more components using up the power. You could calculate the power on each of the components this way and find out where it is getting used up! It is pretty easy in LTSpice, (thanks to an AAC Member who gave details of shortcut keys in another thread) and you need to figure out how to do this in yours.
 
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