Hello, thanks for responding to my message. HD Video and 3G,6G,12G SDI video require a Tri-level Gen lock signal: 0.3V, -0.3V and ground.I very much understand sync and video. I have read all the comments several times and do not know what your want. Sorry my thick head.
You have a camera.
You have a FPGA.
It appears the camera has 2-level sync, but you want 3-level sync.
I also understand you will never give us the name and number of the camera.
You are not going to say what receives the signal from the camera.
The timing from sync (of any type) to video is very critical. Just adding a new level is not going to help. You must keep the timing from sync to a pixel accurate with in 1/4 pixel. If you video rate of 75mhz you have data every 13nS. You need to position the new sync to within 3nS or you will see noise. (maybe you can get away with 5nS noise)
The camera has a "dot clock" of maybe 75mhz. (I can not know what frequency) Your FPGA has a clock of some frequency. The two clocks need to be the same. Not just the same frequency but the same phase to 3nS. (depending on that is looking at the camera) If you have 75,000,000hz in the camera and 75,000,010hz with the FPGA you will see noise role through the picture 10 times a second.
Maybe the receiving device has a three pixel averaging circuit which will hide much of the noise. It will hide some of the resolution. I see "high resolution" several time in the posts so maybe you do not want to average 3 pixels.
I think you do not like "low resolution sync" and want to add "3-level high resolution sync". By looking at the low resolution sync and using it as a standard you are not going to get better. Then adding on top of that the random 0 to 13nS delay in the FPGA you will have much worse sync.
Don't think so. It sounds like he is designing a genlock signal generator for a hi-def production environment. Back in NTSC times we used a signal called blackburst (also known as "color-black"). These days it is a much less complex signal that relies on the slave equipment developing all internal sync signals and phase-locking its internal master clock to the external tri-sync frequency.It appears the camera has 2-level sync, but you want 3-level sync.
An alternate approach is to use switched current sources rather than voltage sources. An advantage is that you need only two sources, since the source-terminating resistor to GND provides the GND output when both sources are off.
Your three buildout resistors form a combined source impedance of 32.5K. What kind of cable are your driving, and what is its characteristic impedance? And, what is the termination impedance at the far end? If the cable impedance and/or termination are in the 100 ohm range, then the buildout redsistors will attenuate the amplifier output voltages by over 300-to-1.Hello, wanted to share my solution:
Looks like they got those numbers from the reference info on the LT1399 mentioned earlier... except that they're off by x1000. That pesky little "k" at the end changes everything!Your three buildout resistors for a combined source impedance of 32.5K. What kind of cable are your driving, and what is its characteristic impedance? And, what is the termination impedance at the far end? If the cable impedance and/or termination are in the 100 ohm range, then the buildout redsistors will attenuate the amplifier output voltages by over 300-to-1.
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