how to determine RC in PWM to DAC

Thread Starter

Frank@Frank

Joined Jul 24, 2021
23
截屏2022-02-16 下午4.44.39.png
how do we determine the R and C in this circuit, and why 2nd-order RC filter? what about 3rd-order or a fourth-order RC filter?
 

Thread Starter

Frank@Frank

Joined Jul 24, 2021
23
hi Frank,
What are the details of your PWM signal.?
E
Please confirm the actual values of the two capacitors.
Hi Eric
the PWM signal is coming from a STM32 MCU.
the frequency and the duty is undetermined.
What I try to figure out is the relationship among the PWM frequency, the duty, the value of R&C.
is there a theory that I can base on to design my circuit.
 

BobTPH

Joined Jun 5, 2013
8,816
The filter must suppress the sampling frequency and pass the highest signal frequency of interest. You cannot pick the values without knowing those two things.

And the order of the filter depends also on the two frequencies. The smaller the ratio, the higher order you will need. For example, if your sampling frequency is 100 times the signal frequency, a first order filter is fine. If the ratio is two, you might need an eighth order filter.

Of course, it also depends on the quality of the output you need.

In the case if DC output, you choose RC based on the desired settling time when the output changes.

Bob
 

Thread Starter

Frank@Frank

Joined Jul 24, 2021
23
The filter must suppress the sampling frequency and pass the highest signal frequency of interest. You cannot pick the values without knowing those two things.

And the order of the filter depends also on the two frequencies. The smaller the ratio, the higher order you will need. For example, if your sampling frequency is 100 times the signal frequency, a first order filter is fine. If the ratio is two, you might need an eighth order filter.

Of course, it also depends on the quality of the output you need.

In the case if DC output, you choose RC based on the desired settling time when the output changes.

Bob
Hi Bob.
Thanks for your reply.
what do you mean by ratio?
Say the frequency of PWM is 20 kHz(Vp-p = 3.3V), duty is 50%.
what should I do?
 

BobTPH

Joined Jun 5, 2013
8,816
Hi Bob.
Thanks for your reply.
what do you mean by ratio?
Say the frequency of PWM is 20 kHz(Vp-p = 3.3V), duty is 50%.
what should I do?
If the duty cycke is constant, why are you using PWM and then smoothing it to a DC value when a voltage divider can give you a better signal?

Normally, there are two frequencies involved: the PWM frequency and the frequency at which the duty cycle changes, which is also the frequency of the output signal.

Tell us what you are trying to do, because it now sounds to me like you don’t want a PWM at all.

Bob
 

Ian0

Joined Aug 7, 2020
9,680
Here’s a nice design utility which will plot the frequency response of the RCRC filter.
http://sim.okawa-denshi.jp/en/Fkeisan.htm
If you make the two RC time constants equal, then make the second R ten times the value of the first (and the second C a tenth of the value of the first, thus keeping the RC product the same) you will get a sharper cutoff filter.
You are trying to get the PWM frequency at the bottom of the slope at the right, and the frequencies you want to produce on the flat bit at the left.
 

crutschow

Joined Mar 14, 2008
34,286
what do you mean by ratio?
The ratio of the PMW fundamental (clock) frequency to the highest PWM modulating frequency.
You also need to know how much clock ripple in the recovered DC your application can tolerate, and the accuracy needed in recovering the highest modulation frequency.

From that info you can determine the filter order and corner frequency you need.
 

Thread Starter

Frank@Frank

Joined Jul 24, 2021
23
The ratio of the PMW fundamental (clock) frequency to the highest PWM modulating frequency.
You also need to know how much clock ripple in the recovered DC your application can tolerate, and the accuracy needed in recovering the highest modulation frequency.

From that info you can determine the filter order and corner frequency you need.
Hi Zapper.
Thanks for your reply.
I need to adjust duty cycle to adjust the output voltage.
and the ripple should be <100mV.
I just saw a circuit like I uploaded, and I don't know how to calculate.
so say the frequency of PWM is 20kHz, and the duty cycle is adjustable, say 20% to 50%.
how do I determine the RC value the order.
 

Ian0

Joined Aug 7, 2020
9,680
The rise time is approximately 3 time constants (to 95%), so use RC=20us, and you won’t be far wrong.
That would give your filter a cutoff frequency of 8kHz, so you would only be about 18dB down at your PWM frequency, which would give you 0.4V peak-to-peak ripple.
A compromise will be required - either:
a fourth order filter
a slower rise time, or
a higher PWM frequency,
 

BobTPH

Joined Jun 5, 2013
8,816
Another way to look at it. The period of 20 KHz is 50 us, so you are asking for it to come up to the final voltage in 1 cycle. Not easy.

Edit: You originally said the frequency was not yet determined. Make it 100K and your life will be easier.

Bob
 
Last edited:

crutschow

Joined Mar 14, 2008
34,286
Top picture below is the LTspice simulation of a 50% duty-cycle, 100kHz wave, with both a 3-pole active and passive RC filter:
The passive filter (green trace) has a rise-time of about 60µs to within 10% of the final value, and the ripple is about 90mVpp.
The active filter (yellow trace) significantly improves on those values.

Getting that response with a 20kHz signal and an analog filter is not feasible.
Optimizing the 3-pole active filter (bottom picture) for 20kHz gives a risetime of about 100µs and a ripple of about 90mVpp.
The signal is shown going from a 50% duty-cycle to 20% duty-cycle at 0.5ms.

1645122646078.png

****************************************

1645125640062.png
 

Thread Starter

Frank@Frank

Joined Jul 24, 2021
23
thanks guys.
say the frequency f, duty cycle is D which is adjustable from 20% to 80%, the output ripple voltage is less than Vripple mV
is there a formulation can be used to calculate the orders and the RC values?
 

Thread Starter

Frank@Frank

Joined Jul 24, 2021
23
Nothing I know of that doesn't involve some complex math including Laplace transforms.
Hi zapper.
none offense.
so how did you come up with the circuit?
I just want to figure it out how to calculate instead of asking the same question here when the parameter changes.
 

crutschow

Joined Mar 14, 2008
34,286
so how did you come up with the circuit?
Since I (or Wally) never do any more math then we have to (hurts my head), I took the easy way.
I started with a 3-pole active LP filter that only requires one op amp (higher order filters with more op amps will likely give you only marginal improvement), and then tweaked the component values in the LTspice simulator until I got the desired maximum pp ripple,
The more you reduce the ripple by lowering the filter corner frequency, the more you increase the rise-time, so the maximum allowed ripple gives the fastest step-change risetime.
I used a nominal Bessel/Gaussian filter to give little or no overshoot on the step risetime from a sudden PWM duty-cycle change.

Note that the maximum ripple will occur at a 50% PWM duty-cycle.
 

Ian0

Joined Aug 7, 2020
9,680
thanks guys.
say the frequency f, duty cycle is D which is adjustable from 20% to 80%, the output ripple voltage is less than Vripple mV
is there a formulation can be used to calculate the orders and the RC values?
The reduction in ripple is roughly proportional to the ratio of the PWM frequency and the output frequency.
So:
The input ripple would be the PWM amplitude. The output frequency is the frequency you are trying to produce at the output once you have removed the PWM.
For a first order filter
Vpwm/Vripple = Fpwm/Fout
For a second order filter
Vpwm/Vripple = (Fpwm/Fout)^2
For a third order filter
Vpwm/Vripple = (Fpwm/Fout)^3

If your output is just a DC value, then assume an output " frequency" of 1/(2t) where t is the time you can allow it to change level.

If you want a nice smooth change of level, you will need a Bessel filter, and you won't get quite as good a reduction in ripple.
If you can allow the output to overshoot and take a while to settle when you change level, then you can get better ripple reduction.
 
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