Hello everyone. A professor recently gave us the task to turn on four 8-bit displays with only two pins from a pic. While it seems simple i've had some trouble with this. Any ideas? thank you in advance!

 

Why waste a good pin? I can do it with one pin.

 

what kind of displays?

 

i2c?
Technically it is 3 pin, but if you discount ground because all the devices are sharing it, then it is 2 pins. First pin for serial clock. Second pin for serial data.
Assuming the displays have sleep mode.
In i2c each device on the i2c bus has unique address.
Therefore PIC can selectively address specific device on the bus and turn it on or put it back to sleep. Or turn them all on.

 

Why waste a good pin? I can do it with one pin.

Howneto

what kind of displays?

Four of these 7 segment displays.

 

i2c?
Technically it is 3 pin, but if you discount ground because all the devices are sharing it, then it is 2 pins. First pin for serial clock. Second pin for serial data.
Assuming the displays have sleep mode.
In i2c each device on the i2c bus has unique address.
Therefore PIC can selectively address specific device on the bus and turn it on or put it back to sleep. Or turn them all on.

Could it word for these kind of displays?

 

Could it word for these kind of displays?

no.
what you show is too simple to work with i2c.

 

Your original post said that you had 8 bit display. You now show a 7 segment display. I am putting you on my ignore list, no need to waste my time.

 

It is 8 bits if you count the decimal point.

 

Sure. You connect each display to an 8-bit serial in parallel out shift register. You cascade the four shift register together so the shift out bit from one goes to the shift in bit of the next. Using one bit for data and 1 bit for clock you send 32-bits to the shift registers and leave them alone until it is time to change them.

 

Or...or you can use "TTL" serial data similar RS-232 -one pin!

 

Or...or you can use "TTL" serial data similar RS-232 -one pin!

Both sides need clocks of similar frequencies such that the drift of one clock with respect to the other does not affect the asynchronous sampling of the data.