How to clear fifo?

Thread Starter

harold_potter

Joined Aug 6, 2019
3
Hi. I am trying to communicate with flash memory via quadspi(on stm32) but I can't write any data in quadspi_dr register. It just stay 0x00000000. I relaized in quadspi_sr register I get fifo is full fault. I debugged and just when I enable quadspi, fifo becomes full. Why fifo becomes full even if I don't send any data? How do I erase it? My code is:
C:
#include "stm32l4xx.h"                  // Device header


 
void GPIO_init(){
    
    SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN); //A and B port signals
    SET_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOBEN);
    
    GPIOA->MODER |= (0x0000A0A0);
    GPIOA->MODER &= ~(0x00005050);
    
    GPIOB->MODER |= (0x0000000A);
    GPIOB->MODER &= ~(0x00000005);
    
     GPIOB->AFR[0] |= (0XA << GPIO_AFRL_AFSEL0_Pos); //Alternate function settings
    
     GPIOB->AFR[0] |= (0XA << GPIO_AFRL_AFSEL1_Pos);
    
     GPIOA->AFR[0] |= (0XA << GPIO_AFRL_AFSEL2_Pos);
    
     GPIOA->AFR[0] |= (0XA << GPIO_AFRL_AFSEL3_Pos);
    
     GPIOA->AFR[0] |= (0XA << GPIO_AFRL_AFSEL6_Pos);
    
     GPIOA->AFR[0] |= (0XA << GPIO_AFRL_AFSEL7_Pos);
    
}



void QSPI_init()
{ 
    
SET_BIT(RCC->AHB3ENR, RCC_AHB3ENR_QSPIEN); //QSPI clock
    
QUADSPI->CR &= ~(QUADSPI_CR_EN);    //  qspi disable
    
RCC->AHB3RSTR |= RCC_AHB3RSTR_QSPIRST; //force reset

RCC->AHB3RSTR &= ~(RCC_AHB3RSTR_QSPIRST); //force release   
    
QUADSPI->CR |= (QUADSPI_CR_EN);   //  qspi enable
    
QUADSPI->FCR |= 0x1F;   
    
QUADSPI->CR |= 0x01000310;
    
QUADSPI->DCR |= 0x00000101; // CSHT ve CKMODE
    
QUADSPI->DCR |= (0x1C << 16); // memory 4Gbit
    
QUADSPI->DLR |= 0x03; //datalenght 4 byte

QUADSPI->DR  |= 0x0000AAAA;  // example data to be write


}   



int main()
{

    GPIO_init();
    
    QSPI_init();
        
    
    while(1)
    {
        
    QSPI_init();
        
    }
}
 
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