Hi everyone,

First disclaimer, I don’t have a technical / engineering background. In fact I am a financial analyst, and I am currently working on the analog semiconductor space, which is very attractive from a profitability perspective. I am trying to get a better understanding of how long does it take for analog engineers to become proficient in their jobs. I would like to pose these following questions to analog design engineers currently working for analog semiconductor companies of different sizes. Feel free to answer only the questions you are interested in answering.

1. What have been your main strategies for moving up the learning curve?

2. Could you describe the relative importance of interacting with senior analog design engineers and consulting the company’s design library to gain expertise?

3. If you are working for a smaller company, do the patents owned by the “big guys” (i.e., TI, ADI, Maxim) hinder your ability to design new ICs?

4. What are the most frequent challenges when designing analog devices?

5. How long did it take you before you were able to perform a complex design on your own?

6. What analog companies do you admire the most in the industry?

7. What were your top three analog company choices to join after graduation?

8. Which analog company did you pick and why?

I know this is a lot of questions but any help would be greatly appreciated. This is a fascinating industry from an outside perspective, and I would like to understand it better. Let me know if I can help in any sort of way.

 

Um... analog is dead. Everybody doing digital.

 

Hi everyone,

First disclaimer, I don’t have a technical / engineering background. In fact I am a financial analyst, and I am currently working on the analog semiconductor space, which is very attractive from a profitability perspective. I am trying to get a better understanding of how long does it take for analog engineers to become proficient in their jobs. I would like to pose these following questions to analog design engineers currently working for analog semiconductor companies of different sizes. Feel free to answer only the questions you are interested in answering.

I'm not currently working as an analog design engineer and I never worked for one of the big semiconductor companies, so you may want to ignore my responses if they don't fit what you are looking for. I worked for a very small company (ranged from six to eighteen engineers) for fourteen years. But we did designs for more than one company on your list that they has spent years and millions of dollars on before they threw it to us and that we were able to achieve first-silicon success on in less than six months and for under $100k.

1. What have been your main strategies for moving up the learning curve?

Primarily focus on learning what I needed to learn to solve the problems associated with the project I was working on. Also, we tended to help each other across projects and so there were always opportunities to learn things there, as well.

2. Could you describe the relative importance of interacting with senior analog design engineers and consulting the company’s design library to gain expertise?

We basically has our president, who was extremely talented at lunatic fringe analog designs, and then the rest of us (though a bit of informal hierarchy evolved over time). I can't even begin to place a value on the importance of my interactions with him. Sadly, we didn't really have a design library, even of the stuff we had done on previous projects. We were small enough and stable enough that you just found out by word of mouth who to talk to about what. Not the optimal way, but unfortunately at the end of a project the need to get switched over to a new project seemed to always take precedence over properly documenting and closing out the finished project.

3. If you are working for a smaller company, do the patents owned by the “big guys” (i.e., TI, ADI, Maxim) hinder your ability to design new ICs?

Not a bit. We recognized that our value was in the lunatic fringe area of full-custom mixed-signal ASIC design and so we focused on projects that the big boys wouldn't touch, in part because they lacked the flexibility to be innovative and think outside the box like we could. We could never have competed with them in the areas that they were good at, but the reverse was also true.

4. What are the most frequent challenges when designing analog devices?

For us it was usually noise and power. Often it was also physical chip real estate since we typically design pixel arrays that had constraints on how big the pixels could be but yet we needed to do considerable processing within the pixel.

5. How long did it take you before you were able to perform a complex design on your own?

We almost never worked alone. A common project workflow had the president design and layout the pixel, since that was his specialty, and then two or three of the rest of us designed and laid out the rest of the chip. I was probably at a point where I could have done a complete chip design, at least one that wasn't pushing the limits too hard, on my own after the first two or three years, but I think it was probably about six years before the opportunity presented itself. I think I did three chip designs (two for sure) all by myself in the fourteen years I was full-time employed, but I only know of one other person that did even one (and the president wasn't one of them -- his talents were wasted if he was working on the bulk of the chip). Again, we just didn't work that way. About the time I reached that point I started acting as more of a trouble shooter to look at problems that others were having with portions of their designs and explore what the issues were, and also to do the asynchronous logic designs that occasional designs needed because they didn't have a clock or because the clock had to be suppressed during sensitive analog operations but some digital functions still had to proceed. Those are the rolls I generally work in on the occasional times that I consult with them today.

 

Um... analog is dead. Everybody doing digital.

So no one still designs opamps or ADCs, or DACs, or RF components or ....?

 

There are just a few members here on AAC who are retired from the big analog companies.

I would hazard a guess to say that the vast majority of us are independent designers who use the products of the big companies you have listed. We still do a lot of analog design but we use off the shelf chips in our design.

No one company stands out above the other. In your list, you omitted Microchip which also makes analog ICs.

We treat chips as building blocks in the design and hence are not restricted by any company's IP.

I would say it takes three to five years of active design work to become a competent analog designer.

As WBahn said, our biggest challenge is noise and power consumption, and finding the right chip for our design.

 

I'm not currently working as an analog design engineer and I never worked for one of the big semiconductor companies, so you may want to ignore my responses if they don't fit what you are looking for. I worked for a very small company (ranged from six to eighteen engineers) for fourteen years. But we did designs for more than one company on your list that they has spent years and millions of dollars on before they threw it to us and that we were able to achieve first-silicon success on in less than six months and for under $100k.



Primarily focus on learning what I needed to learn to solve the problems associated with the project I was working on. Also, we tended to help each other across projects and so there were always opportunities to learn things there, as well.



We basically has our president, who was extremely talented at lunatic fringe analog designs, and then the rest of us (though a bit of informal hierarchy evolved over time). I can't even begin to place a value on the importance of my interactions with him. Sadly, we didn't really have a design library, even of the stuff we had done on previous projects. We were small enough and stable enough that you just found out by word of mouth who to talk to about what. Not the optimal way, but unfortunately at the end of a project the need to get switched over to a new project seemed to always take precedence over properly documenting and closing out the finished project.



Not a bit. We recognized that our value was in the lunatic fringe area of full-custom mixed-signal ASIC design and so we focused on projects that the big boys wouldn't touch, in part because they lacked the flexibility to be innovative and think outside the box like we could. We could never have competed with them in the areas that they were good at, but the reverse was also true.



For us it was usually noise and power. Often it was also physical chip real estate since we typically design pixel arrays that had constraints on how big the pixels could be but yet we needed to do considerable processing within the pixel.



We almost never worked alone. A common project workflow had the president design and layout the pixel, since that was his specialty, and then two or three of the rest of us designed and laid out the rest of the chip. I was probably at a point where I could have done a complete chip design, at least one that wasn't pushing the limits too hard, on my own after the first two or three years, but I think it was probably about six years before the opportunity presented itself. I think I did three chip designs (two for sure) all by myself in the fourteen years I was full-time employed, but I only know of one other person that did even one (and the president wasn't one of them -- his talents were wasted if he was working on the bulk of the chip). Again, we just didn't work that way. About the time I reached that point I started acting as more of a trouble shooter to look at problems that others were having with portions of their designs and explore what the issues were, and also to do the asynchronous logic designs that occasional designs needed because they didn't have a clock or because the clock had to be suppressed during sensitive analog operations but some digital functions still had to proceed. Those are the rolls I generally work in on the occasional times that I consult with them today.

Thanks Wbahn, You answers are quite insightful.

Would that be asking for too much if I have a follow-up question?

When you say that noise and power (putting aside chip real estate constraints) were the two main design challenges, could you expand on that? Was it because you needed to get increasing signal accuracy with decreasing power constraints? Was it because the ever-changing placement of other components on the PCB created an ever-changing noise profile that you needed to solve?

I am trying to figure out why, after decades of cumulative knowledge in the analog industry, there are limited "foolproof" ways to solve noise challenges. You might think that I am implying that the industry should have found these "foolproof" solutions by now, but it is actually the opposite. As long as new engineer grads can't figure out the challenges you mentioned by simply looking at a training manual or something of the sort, the industry won't get commoditized.

Thanks again!

 

Thanks Wbahn, You answers are quite insightful.

Would that be asking for too much if I have a follow-up question?

When you say that noise and power (putting aside chip real estate constraints) were the two main design challenges, could you expand on that? Was it because you needed to get increasing signal accuracy with decreasing power constraints? Was it because the ever-changing placement of other components on the PCB created an ever-changing noise profile that you needed to solve?

I am trying to figure out why, after decades of cumulative knowledge in the analog industry, there are limited "foolproof" ways to solve noise challenges. You might think that I am implying that the industry should have found these "foolproof" solutions by now, but it is actually the opposite. As long as new engineer grads can't figure out the challenges you mentioned by simply looking at a training manual or something of the sort, the industry won't get commoditized.

Thanks again!

The simple answer is that there are no "foolproof" solutions to reducing noise. It would take five to ten years working experience to produce ultra low-noise analog designs.

 

There are just a few members here on AAC who are retired from the big analog companies.

I would hazard a guess to say that the vast majority of us are independent designers who use the products of the big companies you have listed. We still do a lot of analog design but we use off the shelf chips in our design.

No one company stands out above the other. In your list, you omitted Microchip which also makes analog ICs.

We treat chips as building blocks in the design and hence are not restricted by any company's IP.

I would say it takes three to five years of active design work to become a competent analog designer.

As WBahn said, our biggest challenge is noise and power consumption, and finding the right chip for our design.

The simple answer is that there are no "foolproof" solutions to reducing noise. It would take five to ten years working experience to produce ultra low-noise analog designs.

Hi MrChips, would that be too challenging to explain to a non-technical person why working experience is critical at a high level? Essentially, why there are no foolproof solutions to reducing noise? Is it because you need to develop intuition to know how the different types of noise are interacting together to detect which ones are causing the most problems? Is it because every time you are introducing a solution to one problem, you create another one, therefore the optimized solution is very iterative-driven?

How would you explain it to your (hypothetical) 15-year-old nephew who wants to be an engineer but does not have the technical background yet?

 

Slowly over a period of decades. My timeline:
1962: Learned FORTRAN
1966: First programming job
1974: Learned digital hardware design
1980: First digital hardware design
1986: Learned SPICE
1992: First analog hardware design

 

Also, we tended to help each other across projects and so there were always opportunities to learn things there, as well.

One of my managers believed in this. After he retired, the other manager nano-managed. Micro-management was too course for this guy.

I was mainly support for the basic semiconductor research and I was probably the most knowledgeable Electronics person there. Since I didn't directly contribute to the basic research and had no degree when I was hired advancing in salary was nearly impossible. I ended up with two degrees.

They ended up with a lab that exploded. The Hydrogen detectors that were to be installed were in a box.
My safety system worked because the hood velocity detectors broke. We could not say if we had the detectors installed, there would have been less damage.

An excess-flow valve (a safety device) failed and the operator assumed the 2000 PSI tank of Hydrogen was empty. He cracked the cylinder valve to re-seat the valve and let a burst of cylinder rated pressure through a line basically rated for 30 PSI. The gas likely exploded with no fire evidence. This was during a cylinder change where the regulators had to be pumped out before the cylinder valve is opened.

An orifice replaced the excess-flow valve on the gases and some cylinders got dedicated purges. 120 VAC non-UL listed valves rated for cylinder pressure were replaced with air operated ones. The velocity alarms were upgraded and the Hydrogen alarms were installed.

Not the optimal way, but unfortunately at the end of a project the need to get switched over to a new project seemed to always take precedence over properly documenting and closing out the finished project.

And I really hope it bit them in the face. Because of the nano-manager, I had to design and build while doing my normal job and did not do a schematic first. I just bought parts that I thought I needed and threw them together with notes.

nano-manager was ore concerned in impressing the "big boss" than getting the project done on time.
He wanted to Check things off as done and I wanted to complete the project "on time". I'm not going to complete something that I see no issues with when I have lead times and design times for the next part I have to do. So, I end up with everything hanging at say 90% complete.

I really liked it when I could spend an hour helping someone else without getting permission and the one boss knew that overall productivity went up. In one documented case, 5 minutes of my time was worth the about 20 hours of two PHD's over the weekend. The problem was identified and temporarily solved within 5 minutes. An electrical outlet with a bad ground.

 

In analog design, nothing is ideal and nothing is perfect. A capacitor has parasitic inductance, 3 resistors in series are not equivalent to one resistor, I could measure the resistance of paper, an SMT capacitor mounted flat has a different value than mounted sideways, A swinging wire in mid-air generates a current, a resistor is a noise source.

All of the stuff above, I've seen. Sometimes it matters and sometimes it does not.

 

Hi MrChips, would that be too challenging to explain to a non-technical person why working experience is critical at a high level? Essentially, why there are no foolproof solutions to reducing noise? Is it because you need to develop intuition to know how the different types of noise are interacting together to detect which ones are causing the most problems? Is it because every time you are introducing a solution to one problem, you create another one, therefore the optimized solution is very iterative-driven?

How would you explain it to your (hypothetical) 15-year-old nephew who wants to be an engineer but does not have the technical background yet?

Noise is a fact of life and part of nature. You cannot eliminate it. You have to find strategies to mitigate it.

There are different types of noise. In basic analog systems, thermal noise is the most common and ubiquitous.
Current in a system is an averaged measurement of billions of electrons in motion. Hence you are measuring a statistical average. That, by it's very nature will be noisy.

Compounded with that, we have to add induced noise, that is noise created by external sources which we can lump into electromagnetic interference (EMI). Every motor, automobile, radio and tv transmitter, cell phone, computer, wifi router, microwave oven, AC power source, are man-made sources of EMI.

There are circuit induced noise, noise created by one's own design, power supply, switching circuitry, digital gates, etc.

There are also naturally occurring noise sources such as lightning, thunderstorms, naturally occurring radiation, radiation from outerspace, alpha, beta, gamma and cosmic rays, cosmic microwave background (CMB), aurora inducing solar noise.

The strategies for noise mitigation are not uniform and depend on specific application and situation.

Here are some typical scenarios.

You want to design a 32-bit analog to digital converter system for measuring seismic activity (earthquakes), conducting geomagnetic mapping (geo-planetary science) or electroencephalography (brainwave analysis).

Is this possible? What are the limitations with respect to noise mitigation? Are there established solutions to any of these situations that will aid in arriving at a working solution?

The bottom line is - there are no "foolproof" solutions.

 

Thanks Wbahn, You answers are quite insightful.

Would that be asking for too much if I have a follow-up question?

When you say that noise and power (putting aside chip real estate constraints) were the two main design challenges, could you expand on that? Was it because you needed to get increasing signal accuracy with decreasing power constraints? Was it because the ever-changing placement of other components on the PCB created an ever-changing noise profile that you needed to solve?

I am trying to figure out why, after decades of cumulative knowledge in the analog industry, there are limited "foolproof" ways to solve noise challenges. You might think that I am implying that the industry should have found these "foolproof" solutions by now, but it is actually the opposite. As long as new engineer grads can't figure out the challenges you mentioned by simply looking at a training manual or something of the sort, the industry won't get commoditized.

Thanks again!

Power was generally a factor for one of two (possibly both) reasons. The first might be available power budget, particularly for something that is battery powered or powered by low capacity sources such as solar cells or even RTGs. The second is heating/cooling implications. If you are running an imager that is cooled to cryogenic temperatures using a thermoelectric cooler, you need to really minimize the amount of heat that needs to be carried away. But even on room temperature, or elevated temperature, designs the presence of temperature gradients across the chip causes changes in performance, which is its own kind of noise. Some of our designs were IR bolometers in which we were measuring the change in temperature, usually indirectly, caused by IR radiation hitting the pixels, so any heat from the chip operation that made it to the sensing elements in the pixel were a huge problem.

Modeling the thermodynamics of a chip so that you can anticipate the temperature distribution across it requires very sophisticated software and lots of computer time, neither of which we could afford, so we had to approach the design and layout using intuition and deduction to spread things out as well as possible and rely on very simple models, often done by hand, to try to validate, to the degree we could, whether the design would meet spec.

As for noise, there are all kinds of different kinds of noise and a pretty much unlimited number of ways in which the noise source can couple to the sensitive portions of the circuit. You simply can't analyze them all and you can't just make a list of the top ten and ignore the rest -- it is very application specific in that on one design a certain noise mode might be ignorable while on a different design it is dominant. You have to develop the ability to identify which noise sources are going to be a problem and which aren't. You also have learn what coupling mechanisms are important and which aren't. Then you have to have some means, even if it's pretty simplistic, to estimate the magnitude of the noise that gets into the sensitive parts of the circuit and what impact it has. Then there are different ways of mitigating that noise through signal processing, depending on the kind of noise, such as correlated double sampling or turning otherwise random noise into fixed pattern noise that can be calibrated out. But none of these techniques are sufficiently generic so that you can just always turn a crank and use them. One of the big noise sources that we had to deal with were the ground currents from the digital logic cells getting into the substrate and, from there, into the noise-sensitive circuits. The standard logic cells provided by the fab houses were never good enough and so we always had to custom layout our own logic cells and then we had to hand route the power, ground, and substrate connections from the logic blocks to avoid coupling to the analog circuitry. For some parts of the circuit this was easy, but for other parts it was a real challenge and sometimes simply could not be done optimally, particularly when you had digital blocks next to noise-sensitive analog parts within each pixel. So then you had to come up with compromises and figure out ways of running the circuits to minimize the noise impact.

For this and other reasons, analog design will likely remain a black art for decodes to come.