How does a pull up resistor work ?

Thread Starter

Abhinavrajan

Joined Aug 7, 2016
83
Hi all!
I have read what the pull up resistor does.
It prevents the microcontroller from going into a high impedance state or
in other words, it avoids the pin to be in floating state.

But how does it exactly do this work ?
Does the voltage drop across the resistor be fed into the input pin of the microcontroller ?
Or what will be the voltage at the input pin of the microcontroller where the pull up resistor is connected ?

Please let me know.
Thanks in advance! :)
 

HW-nut

Joined May 12, 2016
97
A pull-up resistor provides the source current required to achieve a logic high on it's input. The maximum value may be determined by calculating the voltage drop across the pull-up due the input bias current as it relates to the high threshold voltage of it's input. For example, if the input threshold was 4.8v with a 5v supply and the bias current is 1uA. Then the maximum value of the pull-up is .2v/1uA = 200k.
 

Thread Starter

Abhinavrajan

Joined Aug 7, 2016
83
Got it.

But what if I want the pin in the uC neither in high state nor ground state.
I want it to be left unconnected.
I also know that we should connect a pull up resistor in this case as I don't want the pin to go into high impedance state.

But now, when I connect a pull up resistor in this case, I am more concerned and curious to know about the voltage at the node after the resistor i.e. the voltage at the node infront of or at the input pin of the uC.
 
OK, ignore the mico part of it for now. Picture a resistor ties to +5 and an SPST switch tied to ground.

Simple enough?

We have just "pulled up" a possible input to +5V

So, now as SPST switch has two values GND and +5-(Ip*Rpu). Ip is the current required by the logic family and Rpu is the value if the Pull up.
The resistor limited current has to be able to supply both the logic level and the input current of the family. Without the pull-up, you would need and SPDT switch.

As a Caveot, true CMOS inputs would be OK with a pull-up and a switch, but not OK with a pull up and a transistor. A pull-up and a FET must used because of the 0.6 voltage drop of th transistor is above the logic low value for CMOS.

There are basically four different stages that can be used for TTL, See https://en.wikipedia.org/wiki/Transistor–transistor_logic pull-up, open collector, tri-state and totem-pole. With an open collector output, you can "wire-or" gates without using a gate. tri-state is useful for "busses". The basic pull-up version lacks drive or fan-out, so you don't see it used much within an IC.

You do eventually need to know the requirements of the particular "Logic Family". See https://en.wikipedia.org/wiki/Logic_family

Inputs for TTL float high. A true CMOS input cannot be left in an open state. These are example issues. Processor I/O support devices USED to power up as inputs. Now they can power up as inputs, outputs, and with pull up and pull down resistors.
 

odm4286

Joined Sep 20, 2009
265
No. I just want to know how the pull up resistor works.
This concept confused me too but I think I understand it well enough now. To the more experienced out there, put me in my place if I've gotten any of this wrong. o_O

The resistor is in place so when the circuit is pulled low to ground, closing the switch, there isn't a short circuit. When the switch is open the logic gate is held high (pull up), logic 1. When the switch is closed, the logic gate is pulled low logic 0.

On the flip side is a pull down resistor


Similar idea, the logic gate is pulled low when the switch is open and toggled high when the switch is closed. The resistor is in place to prevent a short circuit. You NEVER want to leave input pins "floating", neither high or low, on a µC because one instant it may register as a 1 another it may register as a 0. Imagine trying to write code for a µC that has unpredictable behavior. Always keep your input pins in a definite state.

There are also other uses for pull down resistors, Like on a gate of a FET, after removing the voltage from the gate there may still be a residual charge which can keep the FET on unintentionally. A pull down resistor fixes this but ensuring the gate is at 0V when the signal voltage is removed.
 
Last edited:

ScottWang

Joined Aug 23, 2012
7,409
@odm4286:
Normally the pin labeled Vin should be connected to the Vcc not Vin, Vin is for the signal input, the Vcc is the power for the IC, and the Vcc for the pull high and pull down resistors should be the same voltage level with Vcc of IC.
 
You did good. I have a comment on the following statement:

Imagine trying to write code for a µC that has unpredictable behavior.
Without the pull-up/down, the input would likely be unpredictable, but it depends largely on the processor architecture. True CMOS inputs need to be at a full high or a full low, or more power is dissipated and the system has a tendency to oscillate and many times the IC gets destroyed.
 

MaxHeadRoom

Joined Jul 18, 2013
28,698
Another situation where a pull-up is required is when a device has an open collector output, a pull up is required to provide a load where the output of the device is fed to a high impedance input.


Max.
 

Thread Starter

Abhinavrajan

Joined Aug 7, 2016
83
OK, ignore the mico part of it for now. Picture a resistor ties to +5 and an SPST switch tied to ground.

Simple enough?

We have just "pulled up" a possible input to +5V

So, now as SPST switch has two values GND and +5-(Ip*Rpu). Ip is the current required by the logic family and Rpu is the value if the Pull up.
The resistor limited current has to be able to supply both the logic level and the input current of the family. Without the pull-up, you would need and SPDT switch.

As a Caveot, true CMOS inputs would be OK with a pull-up and a switch, but not OK with a pull up and a transistor. A pull-up and a FET must used because of the 0.6 voltage drop of th transistor is above the logic low value for CMOS.

There are basically four different stages that can be used for TTL, See https://en.wikipedia.org/wiki/Transistor–transistor_logic pull-up, open collector, tri-state and totem-pole. With an open collector output, you can "wire-or" gates without using a gate. tri-state is useful for "busses". The basic pull-up version lacks drive or fan-out, so you don't see it used much within an IC.

You do eventually need to know the requirements of the particular "Logic Family". See https://en.wikipedia.org/wiki/Logic_family

Inputs for TTL float high. A true CMOS input cannot be left in an open state. These are example issues. Processor I/O support devices USED to power up as inputs. Now they can power up as inputs, outputs, and with pull up and pull down resistors.
I got some clarity but are you telling that - it is the current through the pull up resistor that matters and not the voltage across it so that it can supply the required input current to the logic family ?
 

#12

Joined Nov 30, 2010
18,224
it is the current through the pull up resistor that matters and not the voltage across it so that it can supply the required input current to the logic family ?
Voltage and current are linked by the formula, E=IR
Without voltage, there is no current. Without current, there is no voltage.
Therefore, both current and voltage are essential.
If you don't believe it, try to get some current through a resistor without applying any voltage.
 

avayan

Joined Oct 30, 2015
38
Voltage and current are linked by the formula, E=IR
Without voltage, there is no current.
OK, this is true.

Without current, there is no voltage.
This one, however, is not entirely accurate. A battery has a voltage with 0 current. Current needs a path for it to exist, whereas voltage only requires a potential.

But to answer the question, the pull up requires the designer to consider both the current as well as the voltage. When the input is left alone, it is high impedance so basically it floats. At this level, the logic can't determine whether the input is HI or LO because it is basically dangling in the active region. In other words, the digital electronics are operating as an analog circuit, not a digital circuit. For digital circuits to preserve their discrete property (which is what digital is all about), you need to meet their respective input HI and input LO parameters. For example, a gate may recognize as LO any voltage below 0.8V and as HI any voltage above 2.0V. The logic family will dictate these parameters, as was shown earlier above and what this means is that these values will yield guaranteed LO and HI levels respectively.

If you design something which operates such that the voltage is anywhere in between 0.8V and 2V, then there is no guarantee that the input will read the actual value. For all practical purposes, a digital input which can't effectively discern between a HI and a LO is not a digital input. It's a total piece of [choose your favorite swearing word here].

That is why the voltage is important. You must guarantee that the logic levels are preserved.

But what about current?

Well, as it turns out, the current's meaning is a little bit less important for the great majority of situations. At least it was 10 years ago when nobody cared about the planet and how we are messing with the limited amounts of energy. Today, however, there are so many battery operated devices (as well as some green based regulations) that current consumption is not necessarily trivial. For a tinkerer it may be OK to burn a couple mA in a Pull Up resistor. For a real application, however, you may need to consciously select the Pull Up resistor value to minimize losses. Some applications deal with currents so ridiculously low (in the uA or nA even) that poorly selecting a pull up resistor is plain irresponsible (think heart pacemaker - you don't want that battery to die, period!).

I could go on and on, but I think this is enough blahber. Check out I2C, though, and you will get yet another application where selecting the pull up resistors is beyond crucial!
 

WBahn

Joined Mar 31, 2012
30,072
OK, this is true.



This one, however, is not entirely accurate. A battery has a voltage with 0 current. Current needs a path for it to exist, whereas voltage only requires a potential.
What does a battery have to do with anything? He was very explicitly talking about a resistor.
 

WBahn

Joined Mar 31, 2012
30,072
Hi all!
I have read what the pull up resistor does.
It prevents the microcontroller from going into a high impedance state or
in other words, it avoids the pin to be in floating state.

But how does it exactly do this work ?
Does the voltage drop across the resistor be fed into the input pin of the microcontroller ?
Or what will be the voltage at the input pin of the microcontroller where the pull up resistor is connected ?

Please let me know.
Thanks in advance! :)
A few times you've talked about preventing the microcontroller from going into a high impedance state. How does it do this? For that matter, what does it even mean?

If you are talking about a CMOS input, then the inputs are ALWAYS high impedance. If the pin is left floating, then the voltage on the internal transistor gates is not well defined (unless there is internal circuitry to do so, which we'll assume there isn't) and the inputs are so high impedance that they can take on any value just from the electromagnetic noise present at the pin (the pin acts like an antenna). Thus the input might act as if it where HI, or LO, or somewhere in the middle. The latter is particularly bad as it might turn on both transistors at the same time resulting in sufficient "shoot-through" current to physically damage the device.

So we use pull-up and pull-down resistors to establish a sufficiently defined voltage at the input pin. Because the inputs are very high impedance, very little current will flow through the resistor. Because very little current will flow through the resistor, only a small voltage drop will develop across the resistor (provided the resistance is low enough, with "low enough" being less than several tens of kilohms or so). The places the voltage at the pin well above (for a pull-up) or below (for a pull-down) the relevant voltage level threshold.
 
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