Hi everyone,
I am a total novice and I am attempting to teach myself. I'm required to design a circuit to take a binary input and display a number on a 7 segment display. I can only use AND, OR, NOT, NAND and NOR logic gates.
The numbers need to be displayed sequentially as follows; 1, 5, 6, 6, 9, 5, 5, 7
I need to use 3 sequencers or bit generators in the circuit as input.
I have uploaded my truth table. I really do not know if this is correct. At this point I am totally stuck and don't really know what to do. If the truth table is correct then I've managed to also obtain Boolean equations from it. However I still don't know how to build a circuit from this.
Any help would be hugely appreciated. Thanks for taking the time to read my query.
p.s. I am being directed to firstly construct a separate circuit for each segment from the truth table you have constructed. Then redraw the circuit to combine the separate circuits to form one complete circuit.
p.p.s I am eventually required to use a 3-to-8 decoder to simplify/reduce the number of logic gates
I am a total novice and I am attempting to teach myself. I'm required to design a circuit to take a binary input and display a number on a 7 segment display. I can only use AND, OR, NOT, NAND and NOR logic gates.
The numbers need to be displayed sequentially as follows; 1, 5, 6, 6, 9, 5, 5, 7
I need to use 3 sequencers or bit generators in the circuit as input.
I have uploaded my truth table. I really do not know if this is correct. At this point I am totally stuck and don't really know what to do. If the truth table is correct then I've managed to also obtain Boolean equations from it. However I still don't know how to build a circuit from this.
Any help would be hugely appreciated. Thanks for taking the time to read my query.
p.s. I am being directed to firstly construct a separate circuit for each segment from the truth table you have constructed. Then redraw the circuit to combine the separate circuits to form one complete circuit.
p.p.s I am eventually required to use a 3-to-8 decoder to simplify/reduce the number of logic gates
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