Hi,
I am not able to understand the reason for the increase in the current when both the emitter and collector junctions are forward biased.
I was thinking that when the collector junction is forward biased, less electrons will reach the collector and hence less current. So I could not get what is actually happening over there.
Can anyone explain how the current increases, the electron and hole movement, for a NPN transistor in common emitter configuration.

Thanks,
Srini.

 

This may be of help: http://www.allaboutcircuits.com/vol_3/chpt_2/index.html