High speed signal routing layers

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engr_david_ee

Joined Mar 10, 2023
123
Referring to section 3.2 High Speed Differential Signal Rules. Page 9/21 of the attached document "High-Speed Interface Layout Guidelines" – NOVEMBER 2018 – REVISED FEBRUARY 2023.

Point number 4: "When possible, route high-speed differential pair signals on the top or bottom layer of the PCB with an adjacent GND layer. TI does not recommend stripline routing of the high-speed differential signals."

Given microstrip is not symmetric compared to stripline having reference layers on top and bottom. If differential signals, there are two components, one is common signal or the common voltage level and the other is differential signal or the differential voltage level. I guess in the asymmetric geometry the speed of the common part and the differential part does not remain the same as in case of microstrip and that is the reason we do not route high speed signals on top and bottom layers. Because of symmetric geometry in case stripline, we route the high speed signals in inner layers.

But the TI document is describing something which is opposite.

Point number 5: "• Ensure that high-speed differential signals are routed ≥ 90 mils from the edge of the reference plane." I am not sure what does that means. Kindy explain this. Thanks in advance.
 

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nsaspook

Joined Aug 27, 2009
12,796
Any comment on this please ?
Stripline geometry is designed for single ended coax TEM transmission modes.
https://www.rfwireless-world.com/Terminology/difference-between-TEM-wave-and-quasi-TEM-wave.html
1702037421525.png
Stripline

#5
The reference plane is just B or D here. It just means don't route the signal trace A too close to the edge of the ground plane to minimize fringe effects.
1702037923945.png
1702038108801.png

differential planar TEM modes
1702038291265.png
https://en.wikipedia.org/wiki/Planar_transmission_line


I need an ;) address to send you a bill for engineering RF training.
Use your RF transmission line training when thinking about high speed routing. The wires are guides for the information and energy in the dielectric (this is also true even with a DC circuit but we usually simplify our thought process to circuit theory there).
 
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Thread Starter

engr_david_ee

Joined Mar 10, 2023
123
The following text is taken from the book “Signal Integrity and Power Integrity – Simplified” written by Eric Bogatin.

Chapter 11: Differential Pairs and Differential Impedance

Even and Odd Modes


There are two special voltage patterns we can launch into the pair that will propagate down the line undistorted.

The first pattern is when exactly the same signal is applied to either line; for example, the voltage transitions from 0 v to 1 v in each line.

The second special voltage pattern that will propagate unchanged down the differential pair is when the opposite-transitioning signals are applied to each line; for example, one of the signals transitions from 0 v to 1 v and the other goes from 0 v to –1 v.

To distinguish these two states, we call the state where the same voltage drives each line the even mode and the state where the opposite-going voltages drive each line the odd mode.

Velocity of Each Mode and Far-End Cross Talk

The description of the signal in terms of its components propagating in each of the two modes is especially important in edge-coupled microstrip because signals in each mode travel at different speeds.

The velocity of a signal propagating down a transmission line is determined by the effective dielectric constant of the material the fields see. The higher the effective dielectric constant, the slower the speed, and the longer the time delay of a signal propagating in that mode.

In the case of a stripline, the dielectric material is uniform all around the conductors and the fields always see an effective dielectric constant equal to the bulk value, independent of the voltage pattern.

The odd and even-mode velocities in a stripline are the same.

However, in a microstrip, the electric fields see a mixture of dielectric constants, part in the bulk material and part in the air. The precise pattern of the field distribution and how it overlaps the dielectric material will influence the value of the resulting effective dielectric constant and the actual speed of the signal. In the odd mode, more of the field lines are in air; in the even mode, more of the field lines are in the bulk material. For this reason, the odd-mode signals will have a slightly lower effective dielectric constant and will travel at a faster speed than do the even mode signals.

In a stripline, the fields see just the bulk dielectric constant for each mode. There is no difference in speed between the modes for any homogeneous dielectric interconnect.

In an edge-coupled microstrip, a differential signal will drive the odd mode so it will travel faster than a common signal, which drives the even mode.
 

nsaspook

Joined Aug 27, 2009
12,796
Kindly reply to my question in post #5.
Still waiting for that address. ;)

https://forum.allaboutcircuits.com/threads/high-speed-signal-routing-layers.197658/post-1870263
Point number 4: "When possible, route high-speed differential pair signals on the top or bottom layer of the PCB with an adjacent GND layer. TI does not recommend stripline routing of the high-speed differential signals."

Avoid using vias if possible with high speed signals.
https://www.protoexpress.com/blog/best-high-speed-pcb-routing-practices/
 

drjohsmith

Joined Dec 13, 2021
850
There are many "recommended" design "rules" for pcb's
and for each, there is an exception,
Whats important is to understand why the "rule" is there,

You stated that
" Given micro strip is not symmetric compared to strip line having reference layers on top and bottom "
The possible confusion comes about depending if you have differential or single ended signals

Lets assume differential signals, routed side by side.
you have two impedance and couplings,
the one between the two side by side tracks, and between the tracks and the "reference" plane if present, normally ground

The advantage of signals only on top and bottom ( micro strip ) are,
the thickness between track and the reference layer is normally a board, not a pre preg, so is well defined.
any via is "top to bottom" , has no stub to cause impedance problems
debug and design tends to be easier due to access

Disadvantage
outer tracks dielectric impedance is partially defined by the board coating, which is variable
outer tracks are generally plated up in thickness which might affect your calculations
outer tracks radiate more than inner tracks due to screening,
outer layers can be thick between the gnd reference and the tracks, resulting in large track spacing to achieve impedance
The real estate on top / bottom can be crowded with those dammed components

regarding strip line
he tracks dont have to be placed in the middle of two layers, its just easier to design by hand, but with CAD not so difficult.

We route according to the signal and board needs,

What are you trying to do @engr_david_ee
 

AnalogKid

Joined Aug 1, 2013
10,944
If differential signals, there are two components, one is common signal or the common voltage level and the other is differential signal or the differential voltage level.
That sounds more like a description of a single-ended signal. A differential pair has two out-of-phase components *plus* a third component that is the reference potential (common voltage level), usually GND.

Point number 5: "• Ensure that high-speed differential signals are routed ≥ 90 mils from the edge of the reference plane." I am not sure what does that means. Kindy explain this.
As shown in the #3 images, the field around a pcb trace extends outward in all directions, and you want the ground plane to be beneath all of those directions. If the edge of a conductor is running directly above the edge of the ground plane, the field outward from one of the conductor edges will have no plane beneath it. Thus, one side of the conductor will see a higher impedance to GND compared to the other side. I have not read the article, but my guess is that the TI number probably is based on something like average dimensions of a 4- or 6-layer board, an assumed bandwidth, etc.

ak
 

Thread Starter

engr_david_ee

Joined Mar 10, 2023
123
@drjohsmith
@nsaspook


Alright. TI does not recommend stripline routing of the high-speed differential signals.

I am still wondering about the reference I share in #4 above from the book “Signal Integrity and Power Integrity – Simplified” written by Eric Bogatin.

"The odd and even-mode velocities in a stripline are the same."

"However, in a microstrip, the electric fields see a mixture of dielectric constants, part in the bulk material and part in the air. The precise pattern of the field distribution and how it overlaps the dielectric material will influence the value of the resulting effective dielectric constant and the actual speed of the signal. In the odd mode, more of the field lines are in air; in the even mode, more of the field lines are in the bulk material. For this reason, the odd-mode signals will have a slightly lower effective dielectric constant and will travel at a faster speed than do the even mode signals."

In stripline the odd and even mode velocities are the same. Should not it is better to route differential pairs on inner layers in stripline transmission line ?
 

drjohsmith

Joined Dec 13, 2021
850
@drjohsmith
@nsaspook


Alright. TI does not recommend stripline routing of the high-speed differential signals.

I am still wondering about the reference I share in #4 above from the book “Signal Integrity and Power Integrity – Simplified” written by Eric Bogatin.

"The odd and even-mode velocities in a stripline are the same."

"However, in a microstrip, the electric fields see a mixture of dielectric constants, part in the bulk material and part in the air. The precise pattern of the field distribution and how it overlaps the dielectric material will influence the value of the resulting effective dielectric constant and the actual speed of the signal. In the odd mode, more of the field lines are in air; in the even mode, more of the field lines are in the bulk material. For this reason, the odd-mode signals will have a slightly lower effective dielectric constant and will travel at a faster speed than do the even mode signals."

In stripline the odd and even mode velocities are the same. Should not it is better to route differential pairs on inner layers in stripline transmission line ?
Suggest you try to talk to mr E bogatin if your questioning what they write.
I have many old books, many of which are comical , such as using lots of split power planes.
You chose which star you want to follow.
 

nsaspook

Joined Aug 27, 2009
12,796
@drjohsmith
@nsaspook
...
In stripline the odd and even mode velocities are the same. Should not it is better to route differential pairs on inner layers in stripline transmission line ?
Perfect is the enemy of the good. You're asking if one thing is better when there are several things (device placement, wire to board connector placement, vias, a ground plane sandwich, etc... ) of importance that determine what's good/better.
 

Thread Starter

engr_david_ee

Joined Mar 10, 2023
123
@nsaspook
If we consider device placement, wire to board connector placement, vias, a ground plane sandwich, etc.. all optimum and can't be improved further then the question regarding routing layer still remains, right ?
 

drjohsmith

Joined Dec 13, 2021
850
@nsaspook
If we consider device placement, wire to board connector placement, vias, a ground plane sandwich, etc.. all optimum and can't be improved further then the question regarding routing layer still remains, right ?
How do you define optimum placement?
I don't think I've had a board where there is not an engineering compromise on placement , routing , et all .
All the bits mentioned and many more you will learn as you progress are compromises that we as engineers have to balance.
Add to the pure engineering the cost, test , manufacturability of a design , and you are always compromising.
For now , I'd suggest you just take that as a truth .
Good luck
 

nsaspook

Joined Aug 27, 2009
12,796
@nsaspook
If we consider device placement, wire to board connector placement, vias, a ground plane sandwich, etc.. all optimum and can't be improved further then the question regarding routing layer still remains, right ?
For high speed digital you use RF transmission line design patterns. Reduce discontinuities in the transmission path and match impedance at each step of the way. They can't be all optimal in any practical sized and functional PCB.

You think about waves, how they travel and what's a good solution for the system of parts, as a whole, to optimize signal integrity.
 
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