Hi all,
I am a rookie in circuit design. Could anyone help me with the drop in output during hold? It is observed when the sampled input is a negative voltage.

 

Post a schematic. I don't know what's in the compressed file and I'm not about to open it.

 

heres the schematic

 

The LM308 symbol is pretty useless without pin numbers. Which capacitor has the voltage drop? What is U1?

I don't see parameters for the input signal and can barely read the labels for V2 and V3. Are you using +/- 15V supplies? Looks like it could be 15 or 16.

 

Could anyone help me with the drop in output during hold? It is observed when the sampled input is a negative voltage.

If by "during hold" you mean that there is a sample and hold circuit, I don't see one.

ak