Help with synchornous BCD counter

Thread Starter

FreddyF

Joined Jun 16, 2023
2
I constructed this BCD counter in multisim, but for some reason it doesnt work as intented. I double checked all the ins and outs
The problem: the first probe keeps blinking and the rest remain on, the carry remains off

What is the problem?
 

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Thread Starter

FreddyF

Joined Jun 16, 2023
2
well for some reason 1K was loose and I fixed this. The problem still remains; I even removed the 7408 and wired everything again; my head is spinning
 

WBahn

Joined Mar 31, 2012
29,530
What, exactly, do you mean by "first probe"?

Are those the circles in your schematic labeled X1 through X5? If so, is X1 the "first probe"?

What is the significance of the 2.5 V annotation next to each of them? Is this a simulation measurement result?

What is the significance of the lines emanating from X2 through X4? Does that mean that they were HI at the moment the image was captured?

What is the significance of the different colors of lines in the schematic?

A capture of the simulation results versus time would be much more useful so that we can see exactly which signals were at which levels at which times.

Is this supposed to be a 4-bit counter?

A schematic of the logic -- not a wiring diagram of the parts, would be more helpful in analyzing the logic.

Your logic makes no sense.

Why isn't the output of FF1 in U1 used for anything? 1Q goes to X1 (and only X1) while ~1Q is unconnected. So what is the purpose of FF1 in U1?

Let's consider the net connected to U1-2K. What pins are on this net?

U1-2K (an input)
U3-4B (an input)
U3-3B (an input)
U3-1A (an input)
U2-2K (an input)

There is no output driving this net. What is supposed to establish the logic level on this net?

Your don't even have the K input to FF1 in U2 connected? How do you expect this FF to behave?

What have you done to verify that you have wired up these components correctly?

The place to start is with your logic design. Show how you came up with your logic.

Start with your state diagrams and from that go to your state transition table. Then show how you went from that to your excitation logic for your JK FFs.
 

bertus

Joined Apr 5, 2008
22,233
Hello,

The dark colors are very bad to read.
I have "inverted" the colors, it makes it a little better readable:

BCD_Inverted colors.PNG
Bertus
 

dl324

Joined Mar 30, 2015
16,206
well for some reason 1K was loose and I fixed this. The problem still remains; I even removed the 7408 and wired everything again; my head is spinning
Learn how to draw a readable schematic. This is from TI 40+ years ago. No one has come up with a significantly better method:
74162schematic.jpg

EDIT: But they also came up with some harebrained method for drawing (some) flip flops:
badFlipFlopLogicDiagram.jpg

Fortunately, sanity returned for others:
TI-DFFlogicDiagram.jpg
 
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