Hey Guys,
In the attached circuit, if v1 = v2 = 0 is it safe to say that the circuit is symmetrical and that IQ splits evenly between the two transistors?
Then when going to the small signal model, if I open IQ, does the third transistor fall out of the circuit, leaving only the first and second?
To get the values of the resistors, I was told to solve them under the following conditions:
* v1 = v2 = 0,
* Vo = 0
* IC3 = 0.4 mA
The resistors turned out to be RC1 = 3.684 kΩ and RC2 = 7.5 kΩ
Please don't hesitate to ask for further information if necessary.
In the attached circuit, if v1 = v2 = 0 is it safe to say that the circuit is symmetrical and that IQ splits evenly between the two transistors?
Then when going to the small signal model, if I open IQ, does the third transistor fall out of the circuit, leaving only the first and second?
To get the values of the resistors, I was told to solve them under the following conditions:
* v1 = v2 = 0,
* Vo = 0
* IC3 = 0.4 mA
The resistors turned out to be RC1 = 3.684 kΩ and RC2 = 7.5 kΩ
Please don't hesitate to ask for further information if necessary.
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