In order to avoid confusion, what you call re3 is (r∏3)/(1+β) from my circuit?

Second, if that is true, do I have to rearrange my circuit to use that re3?

Third, I'm assuming you applied reduction theorem to get the input resistance to transistor Q3. Can that be done with my original circuit, if I stick to using r∏3 instead of re3, with the RC2 below the dependent current source?

 

In order to avoid confusion, what you call re3 is (r∏3)/(1+β) from my circuit?

re - Intrinsic resistance of a transistor. This is the resistance that we see when we looking back into the emitter terminal with base connect to the ground.

re ≈ 26mV/Ic

r∏ - is the resistance that we see from the base terminal when emitter is connect to the ground.

r∏ = (β +1 ) * re

Second, if that is true, do I have to rearrange my circuit to use that re3?

No, you don't need to change anything. The result should be the same.

Third, I'm assuming you applied reduction theorem to get the input resistance to transistor Q3.

What "reduction theorem" ?
I don't use any "reduction theorem" to get input impedance. Simply I know the equation for input impedance.
The input impedance for CE amplifier when we assume 1/hoe = ro = ∞ is independent from Rc resistor.

Look at this example

Re current is equal Ie = Ib + Ic = Ib + β*Ib = (β + 1) *Ib
This current create a voltage drop of Ve = Re* (β + 1) *Ib
So V1 = Ib * Rpi + Re* (β + 1) *Ib

And input resistance is equal to

Rin = V1/I1 = V1/Ib = Rpi + Re*(β + 1)

As you can see Rc don't affect circuit input impedance. Because we used ideal current source.

 

Jony130,

That was an excellent explanation! Are you a professor or something?

 

Jony130,

That was an excellent explanation! Are you a professor or something?

Well I'm a hobbyist but I also work as a maintenance technician.

 

In all the excitement, I forget to get the DC currents to solve for r∏ and re. I'd just set the two AC signals (v1 and v2) to 0 V DC, right and solve normally?

 

UPDATE:
I just solved for the DC currents, but my values seem really off. If the current source IQ splits evenly, then the current IC2 (collector of the second transistor) is about 247 uA (pardon my excessive sig figs, if I use any). This would mean that r∏2 = r∏1 = (β pnp)(26 mV)/(247 uA) ≈ 12.6 kΩ.

To get a value for r∏3, I did the following:
(IC2 - IB3)(Rc1) = 0.7V + RE(1 + β npn)(IB3)
With IC2 just solved and using RC1 = 3.684 kΩ, RE = 0.5 kΩ, β npn = 180 . . .
==> IB3 = 2.346 uA
==> IC3 = 0.422 mA
==> r∏3 = (β npn)(26 mV)/(422 uA) = 11.08 kΩ

That would make Rin3 from before be
r∏3 + (1 + β npn)RE = 101.68 kΩ <=== Verified by one of my peers.

If I'm taking my output off of transistor Q2's collector (in my diagram it is C2), then the gain is
Vout/Vin = Vout/(Vd/2)
Vout = (β pnp)(ib2)(RC1 || Rin3)
Vd/2 = -r∏1(ib1) + (β pnp)(ib1)(RC1)
So . . .

Vout/Vd = [(β pnp)(RC1 || Rin3)] / (2[-r∏1 + (β pnp)(RC1)])
Given the previously calculated values and that (β pnp) = 120 . . .
Vout = 426608
Vd = 858960
Which is a gain of about half. Can anyone see any mistake I made here?

 

Wouldn't the input base current magnitudes be given by

\(|i_{b1}|=|i_{b2}|=|\frac{v_d}{2 r_{\pi_1}}|\)

assuming that the PNP's are a matched pair and therefore

\(r_{\pi_1}=r_{\pi_2}\)

I have the overall gain as

\(A_v=\frac{\beta_2 \beta_3 R_{C2} \ [ R_{C1} || \( r_{\pi_3} +\( 1+\beta_3 \) R_E \) \]}{2r_{\pi_2}\( r_{\pi_3} +\( 1+\beta_3 \) R_E \)}=\frac{\beta_2 \beta_3 R_{C1} R_{C2} }{2r_{\pi_2}\(R_{C1}+r_{\pi_3} +\( 1+\beta_3 \) R_E \)}\)

 

Wouldn't the input base current magnitudes be given by

\(|i_{b1}|=|i_{b2}|=|\frac{v_d}{2 r_{\pi_1}}|\)

assuming that the PNP's are a matched pair and therefore

\(r_{\pi_1}=r_{\pi_2}\)

I have the overall gain as

\(A_v=\frac{\beta_2 \beta_3 R_{C2} \ [ R_{C1} || \( r_{\pi_3} +\( 1+\beta_3 \) R_E \) \]}{2r_{\pi_2}\( r_{\pi_3} +\( 1+\beta_3 \) R_E \)}=\frac{\beta_2 \beta_3 R_{C1} R_{C2} }{2r_{\pi_2}\(R_{C1}+r_{\pi_3} +\( 1+\beta_3 \) R_E \)}\)

But according to my circuit, (Vd/2) = V1 isn't the voltage across r∏1. How did you get that?

 

As I look at your schematic I see a closed loop as follows:

gnd->V1->r∏1->e1->e2->r∏2->V2->gnd.

Noting that e1 and e2 are "shorted" in this small signal ac model topology.

Assuming V1>V2 the current flowing in this loop would be

\(\frac{V_1-V_2}{r_{\pi_1}+r_{\pi_2}}\)

If V1-V2=Vd and r∏1=r∏2=r∏

then the small signal (base) current would be

\(\frac{V_d}{2 r_{\pi}}\)

 

Ah, I see now. Thanks for clearing that up!

 

There is a qualification that needs mentioning. My assumptions are correct only if the two PNP's are matched. You might consider a careful analysis of the case of un-matched transistors.

 

There is a qualification that needs mentioning. My assumptions are correct only if the two PNP's are matched. You might consider a careful analysis of the case of un-matched transistors.

Oh yes, your assumption that they are matched is correct according to the original problem. But thank you for the consideration.

 

My original equation for the voltage gain
Av = Av1 * Av2 = ( Rc1|| RinQ3 ) / (2re) * Rc/ ( re3 + Re)

Can be simplified to the form

\(Av = \frac{ R_{C1} R_{C2}(\beta_3+1) } {2r_{e_2}\(R_{C1}+\( 1+\beta_3 \) (R_E + r_{e_3})\)} = 225.923 \)

But when I use t_n_k equation I get different result.

\(A_v=\frac{\beta_2 \beta_3 R_{C1} R_{C2} }{2r_{\pi_2}\(R_{C1}+r_{\pi_3} +\( 1+\beta_3 \) R_E \)}=222.818\)

I wonder why I got a different result?

 

So what did I do in my original calculations from an earlier post to get an answer that was so off? Refer to post #26.

 

I'm not sure, but basis on your calculations it seems that you try to use DC current for AC analysis.
Try this, first use DC current to to determine the

\(r_{\pi_1} r_{\pi_2}\) and \(r_{\pi_3}\)

Next use your small signal model and assume V1 = 2V and V2 = 1V
Or V1 = 0V and V2 = 1V

 

I'm not sure, but basis on your calculations it seems that you try to use DC current for AC analysis.
Try this, first use DC current to to determine the

\(r_{\pi_1} r_{\pi_2}\) and \(r_{\pi_3}\)

Next use your small signal model and assume V1 = 2V and V2 = 1V
Or V1 = 0V and V2 = 1V

Hmm, but I did use only DC currents in the first half of my post #26, which assumes the AC voltages are shorted to ground. That's how I got those r∏ values for the three transistors.

 

Do your small signal analysis again.

Also remember that if we assume V1=1V and V2=0V then

IB1 = IB2 = V1/(2 r∏2) = 1/(2 r∏2)

And output voltage is taken from Q3 collector.

So the output voltage is equal to Vout = Ic3*Rc3

Why you still using Rc1 value as Rc1 = 3.684K ??
The correct answer for Rc1 was shown by t_n_k
Rc1 = 3.667KΩ


Additional I also use matrix analysis to find the "full" solution for your amplifier circuit.
And this method give me exactly the same solution as t_n_k

The method that I use is describe here in more detail
http://forum.allaboutcircuits.com/showthread.php?p=165051#post165051 (post 43)
http://forum.allaboutcircuits.com/showthread.php?t=44651&highlight=matrix

 

Why do we assume that V1 = 0, while V2 = 1 V?

I'll try again, with the resistor, but I don't think a 1% change in RC1 will cause me to go up to 200+ V/V gain.

 

So what did I do in my original calculations from an earlier post to get an answer that was so off? Refer to post #26.

Hi HunterDX77M,

Unfortunately certain parts of your process outlined in post #26 are rather confusing - albeit impenetrable.

I'm surprised you didn't take on Jony130's analysis in post #22 which attracted such favorable comment from you in post #23.

Sometimes a simple reality check in these matters is helpful. Whilst not wishing to hijack Jony130's well considered approach, I would highlight some basic pointers to an approximate solution which is a useful check against the more carefully constructed solution resulting in the "exact" gain formula given earlier.

Ignoring the loading at Q2 collector the differential pair gain is approximately

\(\frac{R_{C1}}{2r_e}\)

Where

\(r_e=\frac{V_T}{I_E}=\frac{0.026V}{0.25mA}=104 \Omega\)

So the approximate differential pair gain with Rc1 about 3.7kΩ would be ...

\(\frac{R_{C1}}{2r_e}\approx \frac{3.7k \Omega}{2(104\Omega)}\approx \frac{3700}{208} \approx 17.8\)

Ignoring the dynamic emitter resistance of Q3 the second common emitter amplifier Q3 stage will have a gain very approximately given by

\(\frac{R_{C2}}{R_E}\approx \frac{7.5k\Omega}{0.5k\Omega}=15\)

So the overall very approximate gain would be ≈ 17.8x15≈270.

This is an overestimate because of the assumptions I made about the diff amp output loading and my ignoring of the Q3 dynamic emitter resistance. But it would be the very maximum overall gain one would expect whilst giving some feel for the likely gain - a reality check so to speak.

I can only recommend that you review post #26 and adopt a more carefully considered approach when forming your equations.

As a more general suggestion, it helps others understand your working if you adopt the Latex equation editing capability in your posts. It requires some effort initially but if you are going to be a regular poster this might be of long term benefit to you.