I don't know how to construct the circuit, when I try to use the INTERRUPT operation. thank you for your consideration! the problem is described simply in the attached file.

 

Are you having a problem designing the hardware to produce the interrupt or are you have a problem setting up the ATMEGA128 to handle the interrupt when it occurs?

hgmjr

 

There are two circuits that you need.
The first is an encoder which has 320 inputs and 9 outputs. The inputs correspond to the rows and the outputs correspond to The row number which has been activated.

ceiling(log2(320)) = 9

For each of the nine outputs you need to write a boolean equation that determines which combination of the 320 inputs is required to turn the output on.

The second circuit has nine inputs and one output. The output is active whnever any of the inputs is active indicating that a diode has been shutoff.

For an example of the encoder concept look at the data sheet for a 74LS148 8 to 3 Priority Encoder. This device encodes the 8 lines and it prioritizes them making some inputs have precedence over others.

 

Are you having a problem designing the hardware to produce the interrupt or are you have a problem setting up the ATMEGA128 to handle the interrupt when it occurs?

hgmjr

I want to design the hardware to produce the interrupt signal

 

Then the information that papabravo has provided should guide you down the correct path.

hgmjr

 

There are two circuits that you need.
The first is an encoder which has 320 inputs and 9 outputs. The inputs correspond to the rows and the outputs correspond to The row number which has been activated.

ceiling(log2(320)) = 9

For each of the nine outputs you need to write a boolean equation that determines which combination of the 320 inputs is required to turn the output on.

The second circuit has nine inputs and one output. The output is active whnever any of the inputs is active indicating that a diode has been shutoff.

For an example of the encoder concept look at the data sheet for a 74LS148 8 to 3 Priority Encoder. This device encodes the 8 lines and it prioritizes them making some inputs have precedence over others.

-------------thank you very much ,I think I need two FPGA/CPLD to accomplish such circuits. thanks ,sir