Help needed on PIC16F877A

pbsllc_2001 · Feb 17, 2009

I am new in PIC programing in ASM, i have modified the Demo program on programing PIC16F877A and after loading the program to the chip is not trigging switch command. It is just blinking Ports A,B,C,D but Port E is not getting switch command. If you can help me to correct my code, i really appreciate it. I can not figure this out by myself, i need experts' help on this. Here is the codes:

;*****************************************************************************
;* Hardw. Rev: P8076'1 Revision..: 1.00 **
;* LIST p=16F877A **
;* include "16F877A.inc" **
;* OSC.......: HS 20MHz Max. POWER.....: 9V DC **
;*****************************************************************************
;*****************************************************************************
;
;1.00 02/09/2009 Start of project
;
;==========================================================================
;
; Register Definitions
;
;==========================================================================
W EQU H'0000'
F EQU H'0001'
;----- Register Files------------------------------------------------------
INDF EQU H'0000'
TMR0 EQU H'0001'
PCL EQU H'0002'
STATUS EQU H'0003'
FSR EQU H'0004'
PORTA EQU H'0005'
PORTB EQU H'0006'
PORTC EQU H'0007'
PORTD EQU H'0008'
PORTE EQU H'0009'
INTCON EQU H'000B'
OPTION_REG EQU H'0081'
TRISA EQU H'0085'
TRISB EQU H'0086'
TRISC EQU H'0087'
TRISD EQU H'0088'
TRISE EQU H'0089'
CMCON EQU H'009C'
;----- STATUS Bits --------------------------------------------------------
IRP EQU H'0007'
RP1 EQU H'0006'
RP0 EQU H'0005'
NOT_TO EQU H'0004'
NOT_PD EQU H'0003'
Z EQU H'0002'
DC EQU H'0001'
C EQU H'0000'
;==========================================================================
;
; RAM Definition
;
;==========================================================================
__MAXRAM H'1FF'
__BADRAM H'8F'-H'90', H'95'-H'97', H'9A'-H'9B'
__BADRAM H'105', H'107'-H'109'
__BADRAM H'185', H'187'-H'189', H'18E'-H'18F'
;==========================================================================
;
; Configuration Bits
;
;==========================================================================
_CONFIG EQU H'3F32'
_CP_ALL EQU H'1FFF'
_CP_75 EQU H'17FF'
_CP_50 EQU H'2BFF'
_CP_OFF EQU H'3FFF'
_DEBUG_OFF EQU H'3FFF'
_DEBUG_ON EQU H'37FF'
_WRT_OFF EQU H'3FFF' ; No prog memmory write protection
_WRT_256 EQU H'3DFF' ; First 256 prog memmory write protected
_WRT_1FOURTH EQU H'3BFF' ; First quarter prog memmory write protected
_WRT_HALF EQU H'39FF' ; First half memmory write protected
_CPD_OFF EQU H'3FFF'
_CPD_ON EQU H'3EFF'
_LVP_ON EQU H'3FFF'
_LVP_OFF EQU H'3F7F'
_BODEN_ON EQU H'3FFF'
_BODEN_OFF EQU H'3FBF'
_PWRTE_OFF EQU H'3FFF'
_PWRTE_ON EQU H'3FF7'
_WDT_ON EQU H'3FFF'
_WDT_OFF EQU H'3FFB'
_RC_OSC EQU H'3FFF'
_HS_OSC EQU H'3FFE'
_XT_OSC EQU H'3FFD'
_LP_OSC EQU H'3FFC'
__CONFIG _BODEN_OFF & _CP_OFF & _DEBUG_OFF & _PWRTE_ON & _WDT_OFF & _LVP_OFF & _HS_OSC
;==========================================================================
; Variable Definition
;==========================================================================
;INPUTS
SW1 EQU H'02' ;SW1 is triggering RE2
TIMER1 EQU H'20' ;Used in delay routine
TIMER2 EQU H'21' ; " " "
PATERN EQU H'22' ;Pattern data for effect's

ORG 0 ;Reset vector address
GOTO RESET ;goto RESET routine when boot.
; *********************************************
; * Example of a delay routine *
; *********************************************
DELAY100 MOVLW D'100' ;54 Generate approx 10mS delay at 20Mhz CLK
MOVWF TIMER2
GOTO DEL_LOOP1
;
DELAY200 MOVLW D'200' ;54 Generate approx 10mS delay at 20Mhz CLK
MOVWF TIMER2
GOTO DEL_LOOP1
DELAY255 MOVLW D'255' ;54 Generate approx 10mS delay at 20Mhz CLK
MOVWF TIMER2 ;WARNING OVER 255
DEL_LOOP1 MOVLW D'255' ;60
MOVWF TIMER1
DEL_LOOP2 BTFSC PORTE,SW1
GOTO MENU
DECFSZ TIMER1,F
GOTO DEL_LOOP2
DECFSZ TIMER2,F
GOTO DEL_LOOP1
RETLW 0

; **********************************
; ** RESET : main boot routine **
; **********************************
RESET MOVLW B'00000111' ;Disable Comparator module's
MOVWF CMCON
;
BSF STATUS,RP0 ;Switch to register bank 1
;Disable pull-ups
;INT on rising edge
;TMR0 to CLKOUT
;TMR0 Incr low2high trans.
;Prescaler assign to Timer0
;Prescaler rate is 1:256
MOVLW B'11010111' ;Set PIC options (See datasheet).
MOVWF OPTION_REG ;Write the OPTION register.
;
CLRF INTCON ;Disable interrupts
MOVLW B'11000000' ;RA5 input, all RA ports are outputs.
MOVWF TRISA ;
CLRF TRISA ;
MOVLW B'11000000' ;all RB ports are outputs.
MOVWF TRISB ;
CLRF TRISB ;
MOVLW B'00000000' ;all RC ports are outputs.
MOVWF TRISC ;
CLRF TRISC ;
MOVLW B'00000000' ;all RD ports are outputs.
MOVWF TRISD ;
CLRF TRISD ;
MOVLW B'11111111' ;all RE ports are inputs.
MOVWF TRISE ;
CLRF TRISE ;
BCF STATUS,RP0 ;Switch Back to reg. Bank 0
GOTO EFFECT_2 ;
;
MENU CLRF PORTA ;
CLRF PORTB ;
CLRF PORTC ;
CLRF PORTD ;
;
;
BTFSC PORTE,SW1
GOTO EFFECT_1
GOTO MENU
;
;
EFFECT_1 BTFSC PORTE,SW1
GOTO EFFECT_1
E1 MOVLW B'00111111' ;
MOVWF PORTA
CALL DELAY100
CLRF PORTA
MOVLW B'00111111' ;
MOVWF PORTB
CALL DELAY100
CLRF PORTB
MOVLW B'11111111' ;
MOVWF PORTC
CALL DELAY100
CLRF PORTC
MOVLW B'11111111' ;
MOVWF PORTD
CALL DELAY100
CLRF PORTD
GOTO E1

EFFECT_2 MOVLW B'00111111' ;
MOVWF PORTA
CALL DELAY255
CALL DELAY255
CLRF PORTA
MOVLW B'00111111' ;
MOVWF PORTB
CALL DELAY255
CALL DELAY255
CLRF PORTB
MOVLW B'11111111' ;
MOVWF PORTC
CALL DELAY255
CALL DELAY255
CLRF PORTC
MOVLW B'11111111' ;
MOVWF PORTD
CALL DELAY255
CALL DELAY255
CLRF PORTD
GOTO EFFECT_2
END

SgtWookie · Feb 17, 2009

This thread is not in the correct forum; it should have been over here: http://forum.allaboutcircuits.com/forumdisplay.php?f=17

You didn't post the source code you started with.

It looks sort of like PORTE may have originally been used as an input to determine whether EFFECT_1 or EFFECT_2 were to be called, but it's hard to tell without the original source.

Straightening up your source using the CODE blocks:

Rich (BB code):

;*************************************************  ****************************
;*          Hardw. Rev: P8076'1          Revision..: 1.00                   **
;*     LIST p=16F877A                **
;*          include '16F877A.inc'         **
;*          OSC.......: HS 20MHz Max.     POWER.....: 9V DC                 **
;*************************************************  ****************************
;*************************************************  ****************************
;
;1.00   02/09/2009      Start of project
;
;=================================================  =========================
;
;       Register Definitions
;
;=================================================  =========================
W                            EQU     H'0000'
F                            EQU     H'0001'
;----- Register Files------------------------------------------------------
INDF                         EQU     H'0000'
TMR0                         EQU     H'0001'
PCL                          EQU     H'0002'
STATUS                       EQU     H'0003'
FSR                          EQU     H'0004'
PORTA                        EQU     H'0005'
PORTB                        EQU     H'0006'
PORTC                        EQU     H'0007'
PORTD                        EQU     H'0008'
PORTE                        EQU     H'0009'
INTCON                       EQU     H'000B'
OPTION_REG                   EQU     H'0081'
TRISA                        EQU     H'0085'
TRISB                        EQU     H'0086'
TRISC                        EQU     H'0087'
TRISD                        EQU     H'0088'
TRISE                        EQU     H'0089'
CMCON                        EQU     H'009C'
;----- STATUS Bits --------------------------------------------------------
IRP                          EQU     H'0007'
RP1                          EQU     H'0006'
RP0                          EQU     H'0005'
NOT_TO                       EQU     H'0004'
NOT_PD                       EQU     H'0003'
Z                            EQU     H'0002'
DC                           EQU     H'0001'
C                            EQU     H'0000'
;=================================================  =========================
;
;       RAM Definition
;
;=================================================  =========================
        __MAXRAM H'1FF'
        __BADRAM H'8F'-H'90', H'95'-H'97', H'9A'-H'9B'
        __BADRAM H'105', H'107'-H'109'
        __BADRAM H'185', H'187'-H'189', H'18E'-H'18F'
;=================================================  =========================
;
;       Configuration Bits
;
;=================================================  =========================
_CONFIG        EQU     H'3F32'
_CP_ALL                      EQU     H'1FFF'
_CP_75                       EQU     H'17FF'
_CP_50                       EQU     H'2BFF'
_CP_OFF                      EQU     H'3FFF'
_DEBUG_OFF                   EQU     H'3FFF'
_DEBUG_ON                    EQU     H'37FF'
_WRT_OFF                     EQU     H'3FFF'    ; No prog memmory write protection
_WRT_256                     EQU     H'3DFF'    ; First 256 prog memmory write protected
_WRT_1FOURTH                 EQU     H'3BFF'    ; First quarter prog memmory write protected
_WRT_HALF                    EQU     H'39FF'    ; First half memmory write protected
_CPD_OFF                     EQU     H'3FFF'
_CPD_ON                      EQU     H'3EFF'
_LVP_ON                      EQU     H'3FFF'
_LVP_OFF                     EQU     H'3F7F'
_BODEN_ON                    EQU     H'3FFF'
_BODEN_OFF                   EQU     H'3FBF'
_PWRTE_OFF                   EQU     H'3FFF'
_PWRTE_ON                    EQU     H'3FF7'
_WDT_ON                      EQU     H'3FFF'
_WDT_OFF                     EQU     H'3FFB'
_RC_OSC                      EQU     H'3FFF'
_HS_OSC                      EQU     H'3FFE'
_XT_OSC                      EQU     H'3FFD'
_LP_OSC                      EQU     H'3FFC'
 __CONFIG _BODEN_OFF & _CP_OFF & _DEBUG_OFF & _PWRTE_ON & _WDT_OFF & _LVP_OFF & _HS_OSC
;=================================================  =========================
;       Variable Definition
;=================================================  =========================
;INPUTS
SW1  EQU H'02'  ;SW1 is triggering RE2
TIMER1  EQU H'20'  ;Used in delay routine
TIMER2  EQU H'21'  ; ' ' ' 
PATERN  EQU H'22'  ;Pattern data for effect's

  ORG 0  ;Reset vector address
  GOTO RESET  ;goto RESET routine when boot.
;  *********************************************
;  *  Example of a delay routine               *
;  *********************************************
DELAY100 MOVLW   D'100'  ;54 Generate approx 10mS delay at 20Mhz CLK
                MOVWF   TIMER2
  GOTO DEL_LOOP1
  ;
DELAY200 MOVLW   D'200'  ;54 Generate approx 10mS delay at 20Mhz CLK
                MOVWF   TIMER2
  GOTO DEL_LOOP1
DELAY255 MOVLW   D'255'  ;54 Generate approx 10mS delay at 20Mhz CLK
                MOVWF   TIMER2  ;WARNING OVER 255
DEL_LOOP1       MOVLW   D'255'  ;60 
                MOVWF   TIMER1
DEL_LOOP2       BTFSC PORTE,SW1
  GOTO MENU
  DECFSZ  TIMER1,F
                GOTO    DEL_LOOP2
                DECFSZ  TIMER2,F
                GOTO    DEL_LOOP1
  RETLW   0
 
;        **********************************
;              **  RESET :  main boot routine  **
;              **********************************
RESET  MOVLW B'00000111' ;Disable Comparator module's
  MOVWF CMCON
  ;
  BSF STATUS,RP0 ;Switch to register bank 1
     ;Disable pull-ups
     ;INT on rising edge
     ;TMR0 to CLKOUT
     ;TMR0 Incr low2high trans.
     ;Prescaler assign to Timer0
     ;Prescaler rate is 1:256
  MOVLW B'11010111' ;Set PIC options (See datasheet).
  MOVWF OPTION_REG ;Write the OPTION register.
  ;
  CLRF INTCON  ;Disable interrupts
  MOVLW B'11000000' ;RA5 input, all RA ports are outputs.
  MOVWF TRISA  ;
  CLRF TRISA  ;
  MOVLW B'11000000' ;all RB ports are outputs.
  MOVWF TRISB  ;
  CLRF TRISB  ;
  MOVLW B'00000000' ;all RC ports are outputs.
  MOVWF TRISC  ;
  CLRF TRISC  ;
  MOVLW B'00000000' ;all RD ports are outputs.
  MOVWF TRISD  ;
  CLRF TRISD  ;
  MOVLW B'11111111' ;all RE ports are inputs.
  MOVWF TRISE  ;
  CLRF TRISE  ;
  BCF STATUS,RP0 ;Switch Back to reg. Bank 0
  GOTO EFFECT_2 ;
  ;
MENU  CLRF PORTA  ;
  CLRF PORTB  ;
  CLRF PORTC  ;
  CLRF PORTD  ;
  ;
  ;
  BTFSC PORTE,SW1
  GOTO EFFECT_1
  GOTO MENU
  ;
  ;
EFFECT_1 BTFSC PORTE,SW1
  GOTO EFFECT_1
E1  MOVLW B'00111111' ;
  MOVWF PORTA
  CALL DELAY100
  CLRF PORTA
  MOVLW B'00111111' ;
  MOVWF PORTB
  CALL DELAY100
  CLRF PORTB
  MOVLW B'11111111' ;
  MOVWF PORTC
  CALL DELAY100
  CLRF PORTC
  MOVLW B'11111111' ;
  MOVWF PORTD
  CALL DELAY100
  CLRF PORTD
  GOTO E1
  
EFFECT_2 MOVLW B'00111111' ;
  MOVWF PORTA
  CALL DELAY255
  CALL DELAY255
  CLRF PORTA
  MOVLW B'00111111' ;
  MOVWF PORTB
  CALL DELAY255
  CALL DELAY255
  CLRF PORTB
  MOVLW B'11111111' ;
  MOVWF PORTC
  CALL DELAY255
  CALL DELAY255
  CLRF PORTC
  MOVLW B'11111111' ;
  MOVWF PORTD
  CALL DELAY255
  CALL DELAY255
  CLRF PORTD
  GOTO EFFECT_2  
  END

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Help needed on PIC16F877A

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Help needed on PIC16F877A

pbsllc_2001

SgtWookie

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