help me !!! supernode problem...


Joined Mar 31, 2012
In your set-up for KCL at Node 2, you first state that the last term is I2, which your diagram indicates is the current flowing downward through the 10Ω resistor. But your next line then replaces I2 with (V2-V3)/2Ω (and start tracking units!!) which is the current left to right through the 2Ω resistor which is NOT the same as I2. Because of this uncaught mistake early on, the rest of everything else you did is wasted time and effort.

Remember what I said in another thread -- the setup is where all of the EE takes place and mistakes there generally cannot be caught later on, so you need to verify that your equations really do reflect the circuit you are analyzing before proceeding on. This needs to be a distinct and separate step. Write the equation and then verify the equation.

Your Node 3 equation has a similar error in that your two terms ignore the current from the voltage source flowing into Node 3.

As for the supernode, the idea is actually quite straightforward. Dealing with things like voltage sources in KCL is tricky because you usually can't write down a simple expression for the current through the source and KCL (and hence Nodal Analysis) is all about current. But what a voltage source does is it establishes a voltage constraint between the two nodes, so you can replace the voltage source with a black box, along with any components that are connected directly across it (though this isn't strictly necessary, just very useful), and apply KCL to the black box.

Take a look at the following with the supernode being everything in the brown hatched area. Just like any other node you write KCL in terms of the node voltages and the components connected to the node. The only difference is that the node voltage you use for each term reflects the supernode terminal for that term, either V2 or V3 in this case. You don't care about ANYTHING that is inside the box, because it is inside the box and you can't see it. What you use the stuff inside the box for is to establish the relationship between the supernode terminals.