hanging source affects the system output

Thread Starter

Chandler Timm Doloriel

Joined Apr 5, 2018
54
Hi all!

In my simulation of ramp generator, there is a bug (i think). When I put a vpulse source that is not connected to any nodes the ramp output is present, but when I delete the hanging source the output doesn't appear. The frequency of my ramp can be change differently by choosing charging capacitor value (I tried it). So it is not the vpulse source that cause the frequency of the ramp.

Any expert can help about this? I am using TSMC 65nm technology in synopsis cdesigner software.
 

Attachments

wayneh

Joined Sep 9, 2010
17,495
Hi all!

In my simulation of ramp generator, there is a bug (i think). When I put a vpulse source that is not connected to any nodes the ramp output is present, but when I delete the hanging source the output doesn't appear. The frequency of my ramp can be change differently by choosing charging capacitor value (I tried it). So it is not the vpulse source that cause the frequency of the ramp.

Any expert can help about this? I am using TSMC 65nm technology in synopsis cdesigner software.
Your graphic is completely unreadable. Well, I can see it, but no details can be seen.
 

Thread Starter

Chandler Timm Doloriel

Joined Apr 5, 2018
54
My circuit is already working and I removed the hanging vpulse. But for my system to operate, my vdd should be vdd=0 at t0=0, meaning it should start at zero volt first then after some time, t1=t with vdd=vdd. I don't know if it is okay having a vdd that starts with 0V and not 1.2V at t=0.
 

Attachments

Top