Grey signal in Logic gate JK flip flops - Proteus

Thread Starter

Egoegi

Joined May 27, 2022
6
Hello everyone,
I've got to design a circuit using only logic gates, a 555ic timer, 7 segment display and diodes; so that my name and surname are displayed on the 7 segment display, each letter with a 1 second delay from the previous letter. Meanwhile, a red LED should be on when the name's letter are being displayed and a blue one for surname's letters.
For sure I will need to use flip flops here, designed using logic gates. I have chosen the master slave JK flip flop configuration using NAND gates. The problem is that I get a grey signal in flip flops' gates, so the circuit is not simulated properly, nothing is displayed.
Could you please help me with this issue? Is necessary to apply some triggering signals to the grey signals that would just provide some initial values, maybe some delta Dirac like functions? Or can it be solved in any other way? I am providing a screenshot of my circuit design as well. Capture.PNGCapture1.PNG
 

dl324

Joined Mar 30, 2015
15,460
Welcome to AAC!
I am providing a screenshot of my circuit design as well.
In the future, please print to PDF and post a clip from that so we don't have to deal with that funky grid and color coded schematics.

I looked at the bottom flip flop and it appears to be correct. Have you verified that a single works?
 

djsfantasi

Joined Apr 11, 2010
8,676
Yes it is. It's an assignment of Digital Circuits class
Thanks for your answer. There is a specific forum for homework problems and it covers a multitude of topics.

Plus, it operates under different forum rules. You need to show your approach. Members are allowed to review your work to provide feedback on potential problems. However, we aren’t allowed to provide any solutions.

I suspect a moderator will move your post where you’ll have to abide by the process.
 

Thread Starter

Egoegi

Joined May 27, 2022
6
Welcome to AAC!
In the future, please print to PDF and post a clip from that so we don't have to deal with that funky grid and color coded schematics.

I looked at the bottom flip flop and it appears to be correct. Have you verified that a single works?
Thank you for your recommendation.
The bottom flip flop doesn't work properly either. Q and Q' are both grey signals, thus the feedback to the first NAND gates is also gray.
 

Thread Starter

Egoegi

Joined May 27, 2022
6

Thread Starter

Egoegi

Joined May 27, 2022
6
Thanks for your answer. There is a specific forum for homework problems and it covers a multitude of topics.

Plus, it operates under different forum rules. You need to show your approach. Members are allowed to review your work to provide feedback on potential problems. However, we aren’t allowed to provide any solutions.

I suspect a moderator will move your post where you’ll have to abide by the process.
Thank you. I get it. I would really appreciate your suggestions and help.
 

dl324

Joined Mar 30, 2015
15,460
The bottom flip flop doesn't work properly either. Q and Q' are both grey signals, thus the feedback to the first NAND gates is also gray.
Have you tried isolating one discrete flip flop from your circuit and verifying that it works by itself? If you set J and K to HIGH, you can clock the circuit manually and follow the signals to see where they're not propagating.
 

dl324

Joined Mar 30, 2015
15,460
Thank you
We all suspected it was homework and no one attempted to do the work for you. Yours was the first I recall that required using NAND gates only.

If you post your work (truth table), we can check your logic. That'll be easier to do than to try reading your schematic because they don't seem to be teaching students how to do them well these days...
 
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