In this circuit, which two cases do I have to consider in order to find the minimum R and maximum R? Will current be flowing into the 7400 for both cases?

http://www.flickr.com/photos/48621893@N02/4453522257/

 

Here is a link to some useful information - http://www.st-andrews.ac.uk/~www_pa/Scots_Guide/datasheets/logic/TTL.html

 

How is that useful here? I already know that inputs and outputs can have a high and low current. I just need to know in each case how the current is flowing in the circuit.

 

The input characteristics can let you figure the maximum R value - what will just pull the 7400's inputs HIGH at DC conditions. The minimum R depends on the clock rate. You can always use about 20 MHz for straight TTL.

 

The input characteristics can let you figure the maximum R value - what will just pull the 7400's inputs HIGH at DC conditions. The minimum R depends on the clock rate. You can always use about 20 MHz for straight TTL.

The the 7400's inputs are high, what's going on with the two 7401's outputs?

 

The state of the 7401's outputs depends on the inputs. Assume all are LOW - the inputs to the 7400 will be pulled HIGH, assuming some minimal value of the pullup resistor. If both inputs to either 7401 go HIGH, then that output goes LOW, and pulls the other output plus the 7400's inputs LOW, again assuming some reasonable value for the pullup.

Bus logic used to have to use pullup resistors and open collector IC's. Life is easier with three state logic.

 

Don't dismiss open collector system as obselete! Examples:

Shared signals on busses, such as interrupt lines.

Shared handshake lines (eg. as used in the IEE488 bus).

The I2C bus.

The open-collector-plus-pullup principle, allowing multiple drivers on a single line, is a fundamental part of many technologies.

(That should give some additional reference sources for how and why certain pullup values are chosen).