I designed and built this controller for fireworks to be computer controlled to play along with music about 10 years ago.
I used an old laptop with a parallel port to control the 5 decoder chips for a total of 90 circuits. There is an LED continuity
indicator on each FET output that is shown only on the first position. Each circuit is wired to
a 1.2 Ohm thin wire resistor that ignites a pyrogen applied over it. (Known as an e-match.) The wire burns out within milliseconds.
Additional resistance in the circuit is provided by 200 feet of wire to the e-match. The e-match has a minimum firing current of 350mA.
The system works well but occasionally fires one of the e-matches at random when the +24 V is switched on by the operator.
First the logic power to the decoders is turned on, then the software clears the port by writing all zeros to it, waiting one second and
writing it again to be sure. Then the operator is prompted to turn on the +24V (all power supplied by batteries).
Does anyone see a flaw in the design that might cause this behavior? I have had to stop using it because of this problem.

 

In stead of connecting pin 23 (enable) to ground, have it pulled up and driven to ground as the master fire signal.
That will ensure there is no spurious fire signal on power up.
This could be driven from the controller or a manual push button that has to be held down.
The fire signal could also operate a relay to switch the 24V on so it only is there for firing times.

 

I like the pin 23 idea as that can be done rapidly enough by the computer. But we need to apply the 24V well
before the firing time so we can check the continuity of all used channels by seeing the lit LED.
Is there some way I could troubleshoot this problem without instrumenting 20 or 30 channels and repeating
the power-up sequence until it fails?

 

One way is to have a beeper, high brightness LED (with appropriate series resistor), or some other indicator, diode ORed from the FET outputs.

An monostable pulse stretcher may be needed if it is fast.

Just out of interest, are the FETs high enough voltage?

 

You could have a fairly high value resistor from each drain to the +24 volt rail before the fuses common was connected to +24 volts. You could then have the positive of a diode connected to each drain. The negative of the diodes would all be connected together to form a negative logic OR gate. There would also need to be a pull up resistor to this common point. If that common point low it would indicate that one or more FETs was conducting. If you could use a lower value to each drain you could add an LED in series with each resistor to show which FET was switched on. You would also need to add a diode in series with each fuse so the fuses did not effectivly connect all of the fet drains together. You could also add an interlock so the relay could not be closed if the diode OR gate was at a low level (A logic high as it is negative logic.)
Edit. I have just noticed that dendad has suggested more or less the same solution and his comment about pulse stretching made me think that the fairly fast edge when the 24 volts is applied to the fuse common could cause a pulse on the gate due to drain gate capacitance. A lower value drain source resistor may solve the problem. A capacitor across this resistor may also help. I have never looked at typical gate drain capacitance values to know if this theory is valid. Just having the pull up resistors on the drains could solve the problem if my theory is correct.
Les.

 

Thanks for all the ideas. I will evaluate on the weekend.
The FETs are rated at 60V and 44 Amps.

 

LTspice simulation confirms that if the rate of change of the FET drain voltage is high (as it could be if 24V is suddenly applied), the gate gets pulled up via the drain-gate capacitance and the FET fires. However, the conduction pulse lasts for only a fraction of a microsecond, so would be unlikely to dissipate enough energy in an e-match to make it even lukewarm.

 

Thanks for running the simulation. I was wondering if something like that might be occuring.
Good to know it is too short a pulse to be a problem. I might consider installing a large
capacitor on the 24V line to slow the rate of voltage increase.

 

I designed and built this controller for fireworks to be computer controlled to play along with music about 10 years ago.
I used an old laptop with a parallel port to control the 5 decoder chips for a total of 90 circuits. There is an LED continuity
indicator on each FET output that is shown only on the first position. Each circuit is wired to
a 1.2 Ohm thin wire resistor that ignites a pyrogen applied over it. (Known as an e-match.) The wire burns out within milliseconds.
Additional resistance in the circuit is provided by 200 feet of wire to the e-match. The e-match has a minimum firing current of 350mA.
The system works well but occasionally fires one of the e-matches at random when the +24 V is switched on by the operator.
First the logic power to the decoders is turned on, then the software clears the port by writing all zeros to it, waiting one second and
writing it again to be sure. Then the operator is prompted to turn on the +24V (all power supplied by batteries).
Does anyone see a flaw in the design that might cause this behavior? I have had to stop using it because of this problem.

FETs are capacitive devices. They rely on a capacitive field in order to function. As such, if you want a FET to fire on positive gate voltage, you should have it's gate tied to ground with a weak pull-down to ensure it's at zero unless charged.

Second, and most people are unaware of this, FETs are really intended to work at about 10V or more. Anything less, depending on FET can cause it to behave in unexpected ways.

 

A 100nF cap from each MOSFET gate to ground will also minimize false operation from transients.

 

BobaMosFET said: " have it's gate tied to ground with a weak pull-down".
Is the 10K that I am using an appropriate value?
Boba also said "FETs are really intended to work at about 10V or more."
Since I'm using 24V I am OK with this parameter too.

crutschow said :"A 100nF cap from each MOSFET gate to ground will also minimize false operation"
I remember considering that when I designed this but for some reason I did not put a cap there.
Thanks. I've got a lot of ideas now to try this winter.

 

Boba also said "FETs are really intended to work at about 10V or more."
Since I'm using 24V I am OK with this parameter too.

It's not clear why he said that.
The Vgs voltage of standard MOSFETs (not the logic-level types you are using) is typically 10V for full turn-on, but the drain-source voltage can be any voltage from zero up to the the MOSFET's maximum rating.