I need to gate a 100MHz signal on/off. I would like to use a two-input AND or NAND gate running on a 5V supply. What is a suitable logic family? A Schmitt input gate might be desirable.

 

I need to gate a 100MHz signal on/off. I would like to use a two-input AND or NAND gate running on a 5V supply. What is a suitable logic family? A Schmitt input gate might be desirable.

Assuming the output can swing between those limits at that speed, what is the maxium propagation delay that can be tolerated? PECL might be the only answer if the requirement is low propagation delay.

 

Prop delay unimportant. Symmetrical tphl and tplh would be a plus. The duty cycle of the input will be between 40/60%.

 

What about an SN74AHC132 Schmitt-trigger NAND gate?
http://focus.ti.com/lit/ds/symlink/sn74ahc132.pdf
Prop delay 1nS to 11nS, depending on load. Seems symmetrical. You'd have to have a very low output capacitance.

I really don't know how fast they'll go.