Extending pulses of a square wave signal

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James George

Joined Jul 26, 2019
3
My idea is to modify a diesel injection system to increase the fueling into the engine.

The signal to an injector is a 0.1-1.5ms long pulse at 12v. I wish to extend the duration of this by ~10%. I could use a 555 timer circuit to delay off time in order to do this. I think is only possible to do with a fixed delay though. Does anyone know of a way to do a percentage increase to the pulses?
 

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Alec_t

Joined Sep 17, 2013
14,263
I haven't thought this through, but perhaps you could charge a cap linearly at rate N while the pulse persists and discharge the cap at rate 10N when the pulse ends, thus giving a new pulse 10% longer than the original. A comparator would identify the start and end of the new pulse.
 

danadak

Joined Mar 10, 2018
4,057
Trivial for a PSOC -

upload_2019-10-8_18-56-28.png

IDE view -

upload_2019-10-8_18-56-54.png

Note most chip unused, see right window. If this is all you do with
part no code is written, although there is code generated that is
programmed into chip for its basic setup.

Note this is a one chip solution. If you need to signal condition input,
because it is noisy or marginal logic levels, one of the onchip comparators
can be used. Lots of other resources onchip, A/D, OpAmps, DAC, PGA,
PWM, Timer.....see attached component list. A component is an onchip
resource. Low end parts have less than attachment shows.


Regards, Dana.
 

danadak

Joined Mar 10, 2018
4,057
I stand corrected.

Given that TS wants pulse extended by proportional amount that implies
pulse must be measured, and the additional percentage time added to
that measurement latency.

So two approaches, one verilog for users capable of doing that.
There is a youtube video showing a design start to end, but that
design is not 10% rather a fixed, but controllable, stretch.

The other use a counter to measure width, calc the 10% increase,
and load that into a PWM to generate the translated pulse. Thats
also fairly trivial for PSOC, but will need a few lines of code. I
estimate 15 - 20 lines of code would suffice.

So question is what is tolerable latency allowable in design ? Would
1 - 2 periods of input pulse be tolerable to issue the revised pulse.
Note this would be a continuous process unless at limits of 0 and 100%
duty cycle, eg. time is needed to calc and correct the final pulse.

Also what is range of input freq and pulse width variation specifications ?
And what accuracy/resolution is desired in the final pulse train ?

It would look something like this (attached).

Again this is one chip, but takes some coding.


Regards, Dana.
 

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Alec_t

Joined Sep 17, 2013
14,263
My idea is to modify a diesel injection system to increase the fueling into the engine.
It's all very well extending the fuel injector drive pulse, but won't the emissions control bit of the ECU detect an over-rich mixture and simply counteract the extension by narrowing the input pulse to the extender circuit? That would nullify the effect of the extension.
 
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