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TLDR:
Is it ok to step change voltage to an eMMC chip from 3V to 3.3V during boot sequence? If so, how critical is the timing of when that voltage change occurs?
Full description:
I'm working on a project using an AllWinner A64 processor, running Linux, booting from eMMC. We're having issues where some boards seem to work reliably, but others fail to boot intermittently. The failure, when it happens, occurs when the kernel should be read from eMMC, but that operation fails and the boot stalls.
Someone suggested I look for noise on the eMMC power supply, so I scoped it. I didn't find any obvious noise, nor any pattern distinguishing good boots from bad boots.
However, I did notice that the eMMC power (which comes from a PMIC chip) starts at 3.0V and then abruptly step-changes to 3.3V. A "good" board (one which rarely, if ever, fails to boot) has this step change about 0.6 seconds after power is initially applied, while a "bad" board (one which frequently fails to boot) has this step change about 1.4 seconds after power is initially applied.
For each board, the timing is consistent from one boot to the next, regardless of whether or not the boot fails. I'm trying to figure out if this difference in timing is related to our boot failures.
I have no previous experience with systems like this, having mostly dealt with simpler controllers like ATmega or MSP430 systems. This is my first time seeing a PMIC in action... I'm used to having discrete regulators for each supply voltage in a system, so I'm certainly out of my depth here!
My intuition says that you shouldn't have dramatic step changes in supply voltage and that this looks like a red flag... but the subcontractors responsible for the design tell me everything is fine.
Just to be clear, I'm aware that both 3V and 3.3V are well within the acceptable tolerance for eMMC required supply voltage, so I'm not worried about voltage being too low or too high, but I do wonder if the sharp step change in supply voltage could disrupt eMMC initialization or read/write operations that were happening when the step change occurred.
Any thoughts on this?
Is it ok to step change voltage to an eMMC chip from 3V to 3.3V during boot sequence? If so, how critical is the timing of when that voltage change occurs?
Full description:
I'm working on a project using an AllWinner A64 processor, running Linux, booting from eMMC. We're having issues where some boards seem to work reliably, but others fail to boot intermittently. The failure, when it happens, occurs when the kernel should be read from eMMC, but that operation fails and the boot stalls.
Someone suggested I look for noise on the eMMC power supply, so I scoped it. I didn't find any obvious noise, nor any pattern distinguishing good boots from bad boots.
However, I did notice that the eMMC power (which comes from a PMIC chip) starts at 3.0V and then abruptly step-changes to 3.3V. A "good" board (one which rarely, if ever, fails to boot) has this step change about 0.6 seconds after power is initially applied, while a "bad" board (one which frequently fails to boot) has this step change about 1.4 seconds after power is initially applied.
For each board, the timing is consistent from one boot to the next, regardless of whether or not the boot fails. I'm trying to figure out if this difference in timing is related to our boot failures.
I have no previous experience with systems like this, having mostly dealt with simpler controllers like ATmega or MSP430 systems. This is my first time seeing a PMIC in action... I'm used to having discrete regulators for each supply voltage in a system, so I'm certainly out of my depth here!
My intuition says that you shouldn't have dramatic step changes in supply voltage and that this looks like a red flag... but the subcontractors responsible for the design tell me everything is fine.
Just to be clear, I'm aware that both 3V and 3.3V are well within the acceptable tolerance for eMMC required supply voltage, so I'm not worried about voltage being too low or too high, but I do wonder if the sharp step change in supply voltage could disrupt eMMC initialization or read/write operations that were happening when the step change occurred.
Any thoughts on this?
