I am working on making an electronic dice which basically uses a 555 timer, a 4026 counter cum driver and a 7 segment display.Now my question is how to make connections so that the 7 segment display displays only upto 6.
I got this ckt but am unable to figure out how it drives the LED display only till 6...
Please help.....

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cant see that working properly, it will reset when segment B is high through C4, to make it reset on 7, you need to detect segments A,B,F only go high then reset the counter, your problem is they go high also on 3,,7,,, i would use a different counter chip,

 

Maybe a big NAND gate & an inverter; inputs , a,b, c, not d, not e, not f, not g. Inverted NAND output to C4.

 

I am working on making an electronic dice which basically uses a 555 timer, a 4026 counter cum driver and a 7 segment display.Now my question is how to make connections so that the 7 segment display displays only upto 6.
I got this ckt but am unable to figure out how it drives the LED display only till 6...
Please help.....

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How does it work? Well, very cleverly, I think.
The B segment is on for numerals 0, 1, 2, 3, 4 and off for digits 5 and 6. Once the chip tries to display 7, segment B is turned on again and that pulse causes the reset.

 

Gopher is correct. Here is the text from the original designer:

This count would normally lie between 0 and 6, since at the leading edge of every 7th clock pulse, the counter is reset to zero. This is achieved as follows. Observe the behavior of ‘b’ seg- ment output in the Table. On reset, at count 0 until count 4, the segment ‘b’ output is high. At count 5 it changes to low level and remains so during count 6. However, at start of count 7, the output goes from low to high state. A differentiated sharp high pulse through C-R combination of C4-R5 is applied to reset pin 15 of IC2 to reset the output to ‘0’ for a fraction of a pulse period (which is not visible on the 7-segment display).

ak

 

How does it work? Well, very cleverly, I think.
The B segment is on for numerals 0, 1, 2, 3, 4 and off for digits 5 and 6. Once the chip tries to display 7, segment B is turned on again and that pulse causes the reset.

Thanks.. But can u explain why are we considering only b? Is it taken randomly or bcoz it is high till 4 & gets low in 5 & 6?but then how does it explain the situation of resetting the IC?

 

Gopher is correct. Here is the text from the original designer:

This count would normally lie between 0 and 6, since at the leading edge of every 7th clock pulse, the counter is reset to zero. This is achieved as follows. Observe the behavior of ‘b’ seg- ment output in the Table. On reset, at count 0 until count 4, the segment ‘b’ output is high. At count 5 it changes to low level and remains so during count 6. However, at start of count 7, the output goes from low to high state. A differentiated sharp high pulse through C-R combination of C4-R5 is applied to reset pin 15 of IC2 to reset the output to ‘0’ for a fraction of a pulse period (which is not visible on the 7-segment display).

ak

Thanks. Can you please explain how does the C - R combination helps in resetting the IC?

 

Thanks.. But can u explain why are we considering only b? Is it taken randomly or bcoz it is high till 4 & gets low in 5 & 6?but then how does it explain the situation of resetting the IC?

Yes, because it is the upper right segment. When it turns back on for a 7, a pulse is created and (with the help of the diode and capacitor, resets the 4017. It might be a little wonky and you may need to play with the capacitor size.

 

Pin 15 is a level-sensitive reset input. As long as it is high, the counter is frozen at 0. Starting at 0, segment B is high but the resistor pulls the right side of C4 to ground. When B goes low for numbers 5 and 6, C4's right side is driven below grond briefly, until it can charge up to ground through R5. Now both sides of C4 are at 0 V. When B goes high for a 7, both sides of Cr jump up. The right side of C4 now is high, and resets the counter to 0 through D1. When reset, the display is at 0 and B still is high, but R5 discharges C4, removing the high signal from the reset input so the counter can count again.

This type of circuit, where a level change is turned into a short pulse, is one form of an electronic differentiator sometimes called a boxcar.

ak