Eagle 7.7 library package editing - How to allocate "pad" name to wires / areas drawn.

Thread Starter

pmd34

Joined Feb 22, 2014
368
Hi folks, I have Eagle 7.7 and want to solve something that has been bugging me for some time when drawing my own Eagle Library package footprints.

Basically is there any way to allocate a net, name or pad to a wire or area of "fill" drawn in the library package editor.

A typical example of this is for the tabs of a through hole DC power socket:
- A large solder area is drawn in the "pad" layer.
- A cut out area can be drawn in the "milling layer" for the slotted solder tabs.
But it seems the only way to get a pin that can be used for connecting up in a schematic, or to nets in the PCB layout is to then add either an SMD pad, or a drilled pad in the center of the drawn pad.

This all works ok-ish, but when it comes to the design rule check it throws up lots of errors, as it sees a lonesome inaccessible pad stuck in the middle of an area. Also things like ground planes don't connect to the pads for the same reason. Sort of ignore-able for a few components, but its a real pain when you have many of them.

Another example example:

I want to make a "complicated" shaped solder tab area - for soldering a nut directly to the PCB:
I draw this in a CAD program and then import it as a DXF file which then nicely plots the area I want as a wire - e.g. in the top layer.
However I then need to somehow tell eagle that this whole wire area should be connected / allocatable to some SMD pad name and connection for the "device".

I have looked through the contents of the library files to try and get some ideas, but so far the only maaaybe possible way would be to start and SMD pad at the start point of every wire, and then "connect" all these pads to the same signal. This appears to be what happens if you draw a large SMD pad and then draw a "wire" in the same layer from the center of it. Eagle somehow knows the wire then has the same net as the pad itself.
But this is a real pain to do and it would mean a very great many SMD pads and connections.

Is there an easier way?!
 

jpanhalt

Joined Jan 18, 2008
7,848
When you refer to "fill" are you doing it with the geometric parts or with a polygon. Those geometric parts (e.g., squares, circles) are for "drawing." The objects cannot be made into signals. Use the polygon tool for signals.

As for naming, a right click or command line entry will allow you to name a signal whatever you want, so long as it's not a duplicate. Ground (GND) is a bit of an exception. When faced with the need to name multiple signals the same, use <name>@1, <name>@2, and so forth.

This type of question is far easier to answer simply, if you post an example. AAC accepts SCH and BRD files, if not, just zip them.

Edit: You can also use the "Name" icon instead of right click.
 
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Thread Starter

pmd34

Joined Feb 22, 2014
368
Hi @jpanhalt Rather than a polygon the area is made of a thick wire of the particular layer, as for example when using the ulp file "import-dxf".
I treid to attach a .brd file as an example, but it was not allowed.
See this as an example: Eagle example.jpg
 

jpanhalt

Joined Jan 18, 2008
7,848
I still don't have a clue what you are trying to do. Are you using the "wire" or "routing" commands. Is item #2 in first attachment what you want to be named as a signal? If so, that is done with a polygon.

I have never imported a DXF as a signal layer nor wanted to. I suspect there might be problems, just as there are when trying to convert a geometric shape to signal. You might import the outline as a different layer and trace it with polygon.

EDIT: Also, DXF lines will be imported as segments, so that result is not surprising.
EDIT2: Comment immediately above is based on importing to Dimension. With a signal layer chosen and polygon checked, it appears to import as a polygon (see post #6).
 
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jpanhalt

Joined Jan 18, 2008
7,848
Actually, I did a test with a DXF imported to Eagle 7.2 (7.7 is virtually the same). It can import into a signal layer and has contiguous segments (be sure prefer polygon is checked). Signal is named AAC1 . That is something I never tried, because my sole need to date has been geometries such as for PCB in a particular box size. I have not tested these steps to see how forward-back annotation is affected. Please let us know what you find out.
 

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Thread Starter

pmd34

Joined Feb 22, 2014
368
@jpanhalt, So now you need to repeat the procedure but in the library package editor so you can use the imported DXF segments as a "component" footprint. You will now find the problem.. you are no longer able to associate the segments with a signal when used in your board.
 

jpanhalt

Joined Jan 18, 2008
7,848
Aside from your original question that is unclear, you have not posted "workable" efforts in Eagle that we can manipulate to explore the problem. It seems you may be trying to make a device with an irregularly shaped pad. That has been discussed on Eagle forums many times. It is doable. Here is one solution: https://www.element14.com/community/thread/17176/l/custom-pad-shape-creation?displayFullThread=true

Scan down to Jorge's reply (last post). He was the Eagle expert in the USA before Autodesk. Your DRC failures are most likely to do with the settings you set for clearances, etc. You can change those, or inhibit them being tested.

Good luck.

Edit: Changed DRG to DRC
 
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