In the lectures and books, they always consider ideal thyristors with zero holding current, so that the thyristor which has been triggered can remain in ON state until the other thyristor is triggered, which means, in such case, any two thyristors will remain ON all the time and we shall get a proper output voltage. But with non-zero holding current, it doesn't happen so.

This problem doesn't occur in single phase full wave rectifiers even with the non zero latching current being considered because we turn ON two thyristors at a time, one from the postive group and other from the negative group. So the thyristors can easily latch into conduction.

Simulation Graph when Latching Current is Considered (R Load, alpha = 30 deg)

The thyristors remain ON only during the time when their respective gate voltage is high, so we get a pulsed output voltage.