Hi guys can anyone help me please. This is my homework.

Design a common emitter amplifier with emitter degeneration using 2N2222 transistor. Supply voltage is 2.5V and the power budget is 5mW . Unloaded gain at 10MHz should be higher than 20dB. Include the bias network, only one dc supply can be used.

can anyone do this in LTspice

 

Since this is homework, the expectation is that you show a reasonable attempt to work the problem yourself and then we help you work around the problems in your attempt. We don't just solve the problem and give you the answer.

 

yes you are right but ı searched and ı didnt understand that part "power budget is 5mW". how can ı calculate this value or ı just give it directly 5mW.

 

Well, what do you think is probably meant by a 5 mW power budget?

Forget about the power budget for the moment and take a shot at designing a common-emitter amplifier with emitter degeneration having a 20 dB gain at 10 MHz using a 2N2222 transistor.

 

20dB=20*log10(Vout/Vin)
20dB/20=log10(Vout/Vin)
1dB=log10(Vout/Vin)
10^1= Vout/Vin
So.
Gain=Vout/Vin=10
This tells you need gain of 10 at 10 MHz.

Now you get to the design part. You have two unknowns, Vout and Vin. You, the designer, choose one of them. Say you choose a sine wave with amplitude of 0.1V and frequency of 10 MHz, then your output should be sine wave with amplitude of 0.1*10=1V and frequency of 10 MHz.

Edit.
Actually. You say that gain should be higher than 20 dB. I have shown that 20 dB is gain of 10. So you want gain of more than 10.

 

thank you guys

 

As shown below a Common Emitter amplifier is made up of,voltage divider bias, the input is Base-Emitter terminal and output is Emitter-Collector collector.

During Positive cycle of input, a sinusoidal AC signal is applied at the input terminals of a circuit that cause the forward bias of base-emitter junction hence VBE is increased resulting in an increase in IB.

The collector current Ic is increased by β times with the increase in IB, hence VCE is correspondingly decreased.