# Design an NMOS amplifier, error on calculation

#### captoro

Joined Jun 21, 2009
207
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#### Ian0

Joined Aug 7, 2020
9,519
It doesn’t look right, but as Vgs(th) can be any value between 0.8V and 3.0V, so any attempt to work out the bias resistors from the typical value of Vgs(th) will be futile

#### captoro

Joined Jun 21, 2009
207
Step one mentions this for Vgs:
From Datasheet of 2N7000, VGS,off = 2 V (VTh) , VGS,on = 10 V and ID,on = 1 A

#### Ian0

Joined Aug 7, 2020
9,519
Here’s the datasheet :
https://www.onsemi.com/pub/Collateral/2N7000-D.PDF
4.7M is a good start, but get a selection of resistors around that value and choose whichever puts the drain voltage closest to half supply. If you work it out with Vgs(th) at its lowest value (0.8V) and again at its highest (3.0V) you’ll see just how big the variation can be.
With a drain current of 800uA, the voltage at the source will be 800uA*1.5k = 1.2V.
So The gate voltage (Vg) needs to be somewhere between 2.0V and 4.2V.
Rg1 = Rg2 * (12-Vg)/Vg
11M for the lowest value of Vgs(th) and 4.1M for the highest, by my calculations.

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