Data Communication in SoC and between SoC and external Elements

Thread Starter

Azoolan

Joined May 15, 2021
1
Dear Ladies and Gentlemen,

First of all, Excuse me if I’m not well at English. I have to hold a lecture about “System on Chip” at the university. For one Part of it, I need information about

1-Methodes of data exchange and Communication between CPU and coprocessor like GPU or Fpga or something else and the related Interfaces
2- Methods of data exchange and Communication between SOC and external blocks and the related Interfaces

For both Questions, i need just the Name and keywords, f.e for first Question AXI. for details i'll read books and papers, but it would be nice if you have time to explain. Thanks.

Thanks
Alireza
 

FlyingDutch

Joined Mar 16, 2021
49
Dear Ladies and Gentlemen,

First of all, Excuse me if I’m not well at English. I have to hold a lecture about “System on Chip” at the university. For one Part of it, I need information about

1-Methodes of data exchange and Communication between CPU and coprocessor like GPU or Fpga or something else and the related Interfaces
2- Methods of data exchange and Communication between SOC and external blocks and the related Interfaces

..

Thanks
Alireza
Hello @Azoolan,

I am a bit confused that you placed this thread in "Machine Learning, AI and Neural Networks", because subject of thread has nothing to do with machine learning or AI. It should be moved to "FPGAs" folder.

BTW: you also not specified what SoCs (what producer: Xilinx or intel). Such comunication is done by using data bus: AXI4 in Xilinx and Avalon in Intel).
 

andrewmm

Joined Feb 25, 2011
1,474
Oh dear,
thats difficult.

How many hours do yo have to talk ? to what level are you teaching. ?

For me that a two hour lesson with active examples, to a age 14 class,

basics,

Data is an abstract item,
moving it around, it does not matter where, be it inside or outside a chip, it does not matter.

For instance, I've worked on a chip where an Ethernet type structure is used inside the chip to connect the different parts,
where as Ethernet is typically considered an external interface.


The key questions.

How much data per second
What latency is allowed
Is lost data allowed, how much ?
Can delay be variable / undefined ?
Physical constraints, on chip / off chip, on die , out side world ?
Is the path always available, is path shared ?


Inside a chip look at things like
Wishbone, AXA, PLM, AMBA


For the youngsters,
I get them to try to send a message reliably between two people via a third,
instructing to press a button, but only when they both know via the messages that they are both going to do it.
have two groups stand at front , with a messenger carrying the written "information" between and the two groups cant see each other.

Edited. messages was measles !
 
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