Creating a simple logic analyzer

Thread Starter

pdavis68

Joined Nov 27, 2013
42
I've never used a real logic analyzer and I can't afford one, but I thought about trying to make a simple one using an Arduino blue pill. They have ten 12-bit ADCs. I want to actually use an ADC to get the voltage level and then use software, based on whether you're talking TTL, CMOS, whatever, to decide the actual logic level of the line.

So having never used one, I honestly don't know much about them in general, but I know what I want out of it, and so that's what I'm going with. For example, I want to have the option of being clock-based, where you tap the clock of whatever it is you're analyzing and that decides when the analyzer samples the data. Optionally you can have it free-running and polling the values are intervals.

Essentially the Arduino will just do data collection, though. I'll send all the data via serial to my computer to analyze real-time. So beyond capturing the voltages, either based on a clock or based on a sample frequency, it's not doing a whole lot.

One of the issues I have is voltage level translation. The blue pill is 3.3V and I need to be able to handle higher voltages (primarily 5V). I don't want to clip the levels. Like if it's 4V, I don't want to clip it at 3.3V.

I can think of a few options: One is to pick a maximum voltage, say 10V, and say that's what I scale everything against and then in the software, you tell it what your logic voltage is and then it'll calculate the logic levels based on that.
So basically just take whatever the input is, divide by 3.33. And for simplicity this is the way I've been leaning. Wondering if I should use a voltage divider or an opamp to scale the voltage?

The other way to let the user set the reference voltage and then scale based on that, but that seems a lot more complicated.

Am I missing any obvious issues?
 

WBahn

Joined Mar 31, 2012
26,272
A lot of it depends on things you haven't mentions, such as the speed of the fastest signals you are concerned with and your maximum sampling rate.

If these are pretty tame, then a simple resistive voltage divider is likely good enough.
 

KeithWalker

Joined Jul 10, 2017
1,290
I could not find any details in the datasheet but I believe that the Blue Pill only has one A/D which is multiplexed between the analog inputs. This would make it useless for monitoring multi-channel high speed logic.
 

Thread Starter

pdavis68

Joined Nov 27, 2013
42
A lot of it depends on things you haven't mentions, such as the speed of the fastest signals you are concerned with and your maximum sampling rate.

If these are pretty tame, then a simple resistive voltage divider is likely good enough.
Yeah, my needs are very minimal. I'm working primarily in sub-mHz speeds, but the Blue Pill should be able to sustain a good bit higher than that. I'll try the voltage divider and see how that works.
 

Thread Starter

pdavis68

Joined Nov 27, 2013
42
What is the fastest A/D conversion rate of the Blue Pill?
That will determine how fast you can detect logic changes.
That's all on page 75. I don't know exactly how to work it out, but the sampling time of 17.1µs seems low enough to meet my 1mHz or slower needs.
 

bertus

Joined Apr 5, 2008
20,869
Hello,

Do you mean milli Herz? ( one cycle in 1000 seconds)
Or do you mean Mega Herz? ( MHz). (one million cycles in a second).

Bertus
 

WBahn

Joined Mar 31, 2012
26,272
You need to be more careful with your units. 1 mHz is 0.001 Hz. The difference between 'm' and 'M' is nine orders of magnitude.
 

WBahn

Joined Mar 31, 2012
26,272
That will meet 1mHz needs but not 1MHz.
17.1µs would be okay up to a maximum digital signal rate of about 29KHz.
I don't know what a kelvin-hertz is, but I would agree with a max signal frequency of 29 kHz, and that's assuming that his system is capable of going right up to the Nyquist limit. Something more like 3 kHz to 10 kHz is probably more reasonable.
 

crutschow

Joined Mar 14, 2008
25,632
that's assuming that his system is capable of going right up to the Nyquist limit. Something more like 3 kHz to 10 kHz is probably more reasonable.
That limit mainly applies to sampling analog signals.
For a digital signal, where you are only interested in a 1 or a 0, you should be able to operate close to 29kHZ (note correct case for the k).
 

Thread Starter

pdavis68

Joined Nov 27, 2013
42
That will meet 1mHz needs but not 1MHz.
17.1µs would be okay up to a maximum digital signal rate of about 29KHz.
Sorry all. I did mean MHz. Not mHz...
And you're right. I must have been off by a few zeroes in my initial calculation. Wonder what I did there...

So the 17.1µs is 58kHz and the sample rate is half that? Is that how you arrived at that?
That's actually quite a bit slower than I was hoping, but still fine for most of my needs.
I suppose if I ever need something faster, I can always purchase some high speed ADC chips.
 

WBahn

Joined Mar 31, 2012
26,272
That limit mainly applies to sampling analog signals.
For a digital signal, where you are only interested in a 1 or a 0, you should be able to operate close to 29kHZ (note correct case for the k).
Agreed on the analog vs. digital. But if he is sampling digital signals, then he should be able to operate at the full clock rate, provided he can avoid framing errors. If he can't synchronize to the signal clock, then he is going to have issues that will require sampling enough times faster than the clock rate (probably more than just twice) to deal with.
 

WBahn

Joined Mar 31, 2012
26,272
You need to detect both the 1 and the 0 of the signal.
That occurs at double the frequency.
Yes, as long as the micro can handle that rate.
In general there is no both 1 and 0 of the signal. Some protocols, such as return-to-zero, ensure that there is both a 0 and a 1 in each bit slice, but most protocols do not and so successive data values that have the same value will see a static signal for the entire time that the signal stays at that value.
 

soyez

Joined Aug 17, 2020
51
I've never used a real logic analyzer and I can't afford one, but I thought about trying to make a simple one using an Arduino blue pill. They have ten 12-bit ADCs. I want to actually use an ADC to get the voltage level and then use software, based on whether you're talking TTL, CMOS, whatever, to decide the actual logic level of the line.

So having never used one, I honestly don't know much about them in general, but I know what I want out of it, and so that's what I'm going with. For example, I want to have the option of being clock-based, where you tap the clock of whatever it is you're analyzing and that decides when the analyzer samples the data. Optionally you can have it free-running and polling the values are intervals.

Essentially the Arduino will just do data collection, though. I'll send all the data via serial to my computer to analyze real-time. So beyond capturing the voltages, either based on a clock or based on a sample frequency, it's not doing a whole lot.

One of the issues I have is voltage level translation. The blue pill is 3.3V and I need to be able to handle higher voltages (primarily 5V). I don't want to clip the levels. Like if it's 4V, I don't want to clip it at 3.3V.

I can think of a few options: One is to pick a maximum voltage, say 10V, and say that's what I scale everything against and then in the software, you tell it what your logic voltage is and then it'll calculate the logic levels based on that.
So basically just take whatever the input is, divide by 3.33. And for simplicity this is the way I've been leaning. Wondering if I should use a voltage divider or an opamp to scale the voltage?

The other way to let the user set the reference voltage and then scale based on that, but that seems a lot more complicated.

Am I missing any obvious issues?
A rationale analyzer is an electronic instrument that catches and shows numerous signs from an advanced framework or computerized circuit. A rationale analyzer may change over the caught information into timing charts, convention interprets, state machine follows, low level computing construct, or may correspond gathering with source-level programming.
 
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