ok i have wired up all unused connections, checked that CEP and CET are at Vcc tired high. Made MR=1, Input connection D0=1, D1=0, D2=0, D3=0 so it will start at count 1.

However it lights up at output with Q0=0,Q1=0,Q2=1. What is my problem?

 

However it lights up at output with Q0=0,Q1=0,Q2=1. What is my problem?

If that is an initial stae, that may be because the chip came up in a random state. That is why logic IC's have resets - to insure they are in a known state before starting to operate.

If you clock long enough for the count to go to 6, what happens then?

 

ok i got the count to work, however it is counting randomly:

the sequence is:
010
011
110
011
010
011
etc....repeated

the next time i done it (switch the Q1 and Q2 cables around that were connected to the NAND gate)
the sequence was:
100
101
110
etc repeated.

Which is the correct method?

 

Look at the data sheet. The count should progress:
0000
0001
0010
0011
0100
etc.

If it's not, there has to be some input left floating that causes the random operation.

 

i tired it again, and it got 4,5,6 but didn't get 1,2 or 3

 

ok well i finally got the circuit working, however can someone explain to me why did it work when i disconnected the red line from the inputs of the NAND gate???

diagram below

 

The IC can only count when the CEP and the CET are both HIGH. The data sheet explains how those inputs get used. By having them tied to the Q1 output, the internal state of the '161 was unable to count properly, although it could do the parallel load function.