Counters,determining the next situation

Thread Starter

avalox7

Joined Aug 9, 2020
31
I have a task to determine which sequence of situations the following counters are generating,the correct answers are for a) is serial counter which counts down the first condition in both counters are Q1Q0=0, this counter counts as 00,11,10,01,00.For b) the correct answer is synchronized counter which counts up:00,01,10,11,00.I want to know how this conditions are determined because I get different,from the truth table of JK.Also for a) I am a little bit confused because clock is connected to Q0,how will I express that when I am writing state equations?Here are the tasks https://prnt.sc/twz7kk.
AAA 480 11.34.gif
 

Thread Starter

avalox7

Joined Aug 9, 2020
31
I have solved under b) I am just confused for a) when I write the truth table C1=Q0,how will that impact Q1 the following state?
 

dl324

Joined Mar 30, 2015
11,231
when I write the truth table C1=Q0,how will that impact Q1 the following state?
Already solved,thanks.
Care to post your truth table/solution?

AFAIK, they don't teach a formal method for designing asynchronous counters. I saw a paper by a couple of professors named El Naga where they proposed a formal method. Instead of having 1, 0, and X in the truth table, they had α, β, I, and Φ, representing transitions of 0->1, 1->0, 1->1, and 0->0, respectively. They talked about some method to determine when, and which, outputs should connected to later stages.
 

Thread Starter

avalox7

Joined Aug 9, 2020
31
IMG_20200813_184245.jpg
So when clock is rising edge the both states are negations of previous one,when we have another rising edge of clock the value of Q of the first flip flop is negation,and that impacts the clock of the other flip flop which is zero so Q1 stay at the same position and so on...
 
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