I have a question on counting the number of occurrences of zero in a 6 bit binary number using solely half and full adders.
My original solution had 2 FA that each sum 3 bits, with inverters stuck to the outputs which then feed into a HA and a FA which produce a 3 bit number. The inverters switch the adders from producing the number of ones in a number to the number of zeros. However I am not allowed to use inverters and was suggested to create an inverter out of HAs or FAs.
Any help or clarification on how I could go about this problem is greatly appreciated.

 

To use adders as logic gates seems pretty dumb. Just remember that the sum output of a half adder is an XOR. And XOR will invert the 'A' input of the 'B' input is a 1.

 

To use adders as logic gates seems pretty dumb. Just remember that the sum output of a half adder is an XOR. And XOR will invert the 'A' input of the 'B' input is a 1.

In any kind of a practical situation, I agree. The point of an exercise like this is to learn to be creative in taking one logic function and using it for other purposes, so I don't think it is an unreasonable academic exercise.

There are a couple of ways to do it. You can do what I think you have in mind, which is invert all the bits in the original vector, or you can remember that an adder can be used to do subtraction very easily. I think, with a vector this small, that you will use few blocks inverting the bits up front. But this will not scale well and for a longer vector you will save blocks by performing the subtraction.

 

To use adders as logic gates seems pretty dumb. Just remember that the sum output of a half adder is an XOR. And XOR will invert the 'A' input of the 'B' input is a 1.

Thanks Joeyd999, I wasn't really thinking about the XOR part of a half adder. I ended up using 8 different units, however I'm not so sure if that is the least number of units I can use.

 

Thanks Joeyd999, I wasn't really thinking about the XOR part of a half adder. I ended up using 8 different units, however I'm not so sure if that is the least number of units I can use.

I'm not seeing how you are doing it with eight units. If you had said seven, I would have suspected you were using two FA to get two 2-bit numbers and then using a HA/FA to add these to get a 3-bit number that is the number of ones. After that, I would have suspected you are using three HA as inverters, but this won't work.

The most straight forward way I can see would require ten, with two different ways to do it. One way would use 7 HA and 3 FA and the other would use 4 HA and 6 FA.

 

I'm not seeing how you are doing it with eight units. If you had said seven, I would have suspected you were using two FA to get two 2-bit numbers and then using a HA/FA to add these to get a 3-bit number that is the number of ones. After that, I would have suspected you are using three HA as inverters, but this won't work.

The most straight forward way I can see would require ten, with two different ways to do it. One way would use 7 HA and 3 FA and the other would use 4 HA and 6 FA.

I basically took the inverters of my original design out and replaced them with HAs. I summed 1 and the output of Sum and Carry of each of the first 2 full adders. I only used the Sum output of the HAs because it uses the XOR function. I then take those outputs which are 2 two bit numbers and add them together to get a 3 bit number.
Poorly Constructed diagram:
5 4 3 2 1 0
| | | | | |
FA FA
S C S C
| | | |
HA HA HA HA
S S S S
| | | |

FA<----Carry-----HA
C S S
| | |
2 1 0

 

It would be better if you showed a schematic / logic diagram, even if it were something thrown together in Paint. But I figured out what you have in mind.

It turns out your design will work, but somewhat by coincidence. Can you show mathematically that your design will work? That would be a good exercise for you and might even get you some extra credit.