Hi forum.
During the reverse engineering of a constant current small LED circuit driven by an IC I run into this "strange" schematic that I attach.
The IC (Infineon's IL6150) is a monolitic LED driver that has an internal PWM generator driven by an analog or digital voltage applied to PIN 2.



The input pin has an internal pull-up circuit to high level if not connected externally on PCB. Icc,PWM current is approx. -18uA

Driving it via a 0 to 4.5V analog voltage changes the PWM according to this table:


So on the PCB there is a polarization circuit I have simulated in LTSpice here:


Two Common emitter NPN in series that should keep PIN2 IC voltage above 4.5V.
Note that this transistor has two internal series biasing resistor (R4,R5 and R6,R7) at the base and the emitter of 47k I needed to insert in the simulation otherwise they gave not the same voltages as measured.
Following logic, Q1 is on, in saturation mode, since V at nod R4,R2 is 4,5V so Q2 should be off.
No external polarization from the collector, so Q2 is off.
Vpin2 has been measured to be 8mV, no current flows out of Q2 collector, pin2 is held high by its internal circuitry.
So Why the heck did you need to implement this external biasing circuitry??
The designer should have something in mind I do not recognize, either because I am missing something or I am wrong in my consideration.
* First of all are my considerations right?

If the designer would have wanted to maybe change and keep at fixed PWM by changing the Vpin2 from 0 to 2.5V according to the datasheet and the PWM dutycycle, what kind of resistor should he have to change?
* Am I correct if I say, I need to turn on Q2 by letting Q1 return into linear mode?
Howto acheive the 0-2.5V voltage range?
Any suggestion howto make such a variable voltage 0-2,5 by a trimpot?
Best regards and thanks

 

Is it an under-voltage lockout circuit?

 

Is it an under-voltage lockout circuit?

Wouldn't that be driven by pin 7, with no connection to pin 2?

 

Wouldn't that be driven by pin 7, with no connection to pin 2?

I'm assuming that the SPICE voltage source Vin is the supply voltage (might be wrong) so that would be connected across pins 4 and 7. If the voltage between pins 4 and 7 is too low, it shorts pin 2 to ground disabling the output.

 

Hi forum.
During the reverse engineering of a constant current small LED circuit driven by an IC I run into this "strange" schematic that I attach.
The IC (Infineon's IL6150) is a monolitic LED driver that has an internal PWM generator driven by an analog or digital voltage applied to PIN 2.
View attachment 329477


The input pin has an internal pull-up circuit to high level if not connected externally on PCB. Icc,PWM current is approx. -18uA
View attachment 329478
Driving it via a 0 to 4.5V analog voltage changes the PWM according to this table:
View attachment 329479

So on the PCB there is a polarization circuit I have simulated in LTSpice here:

View attachment 329481
Two Common emitter NPN in series that should keep PIN2 IC voltage above 4.5V.
Note that this transistor has two internal series biasing resistor (R4,R5 and R6,R7) at the base and the emitter of 47k I needed to insert in the simulation otherwise they gave not the same voltages as measured.
Following logic, Q1 is on, in saturation mode, since V at nod R4,R2 is 4,5V so Q2 should be off.
No external polarization from the collector, so Q2 is off.
Vpin2 has been measured to be 8mV, no current flows out of Q2 collector, pin2 is held high by its internal circuitry.
So Why the heck did you need to implement this external biasing circuitry??
The designer should have something in mind I do not recognize, either because I am missing something or I am wrong in my consideration.
* First of all are my considerations right?

If the designer would have wanted to maybe change and keep at fixed PWM by changing the Vpin2 from 0 to 2.5V according to the datasheet and the PWM dutycycle, what kind of resistor should he have to change?
* Am I correct if I say, I need to turn on Q2 by letting Q1 return into linear mode?
Howto acheive the 0-2.5V voltage range?
Any suggestion howto make such a variable voltage 0-2,5 by a trimpot?
Best regards and thanks

I think your simulation needs to include the pullup arrangement inside the IC consisting of the current source and the Zener diode. Otherwise, the voltage at the collector of Q2 will be GND or undefined. As it stands it is an open collector output.

 

My guess is it's a speed current limiter circuit. It clamps a Vin signal to limit the Pin 2 voltage to ~1.5V.

 

My guess is it's a speed limiter circuit. It clamps a Vin signal to limit the Pin 2 voltage to ~1.5V.
View attachment 329484

I think you nailed it, except for the precise behavior of the pullup inside the Infineon chip. Nice job. Still, it would be nice to know the Zener voltage of the diode inside that chip.

 

My guess is it's a speed current limiter circuit. It clamps a Vin signal to limit the Pin 2 voltage to ~1.5V.
View attachment 329484

What would be the point? The ILD6150 is a constant current driver.
If you wanted to set a reduced current output, then just use a higher value of Rsense.

 

just use a higher value of Rsense

That would be the obvious thing to do. Perhaps the designer wanted a belt-and-braces design, or else was looking to use up some spare components .

 

I think you nailed it, except for the precise behavior of the pullup inside the Infineon chip. Nice job. Still, it would be nice to know the Zener voltage of the diode inside that chip.

Probably it's 5,5V in order to keep overvoltage protection to the digital input pin (that as specs says it admits voltages up to 5,5V) in case of someone puts Vs = 40 V into that.

 

My guess is it's a speed current limiter circuit. It clamps a Vin signal to limit the Pin 2 voltage to ~1.5V.
View attachment 329484

Thank You for the excellent review. Actually measuring PIN2 gives 4,5V. will try simulation since Vin is 12V

 

Again my simulation makes no sense..

Supposing a Vs voltage of 12V (as it is) the behaviour of pin 2 is strange. why is measured voltage 4,5V and simulation shows 0,8V...

 

Maybe because your diode is not a Zener diode.
Q: What is the reason for making Vin a linear ramp from 0 to +12V and repeating that action?

 

Here is what I get for this circuit. A 1N750 is a 4.7V Zener. I just guessed a value that was available. It struck me that V(vz) does not need to be a constant, but it CAN be the average of a periodic waveform. It can certainly be ≈ 2.344 Volts.

 

Hi forum.
During the reverse engineering of a constant current small LED circuit driven by an IC I run into this "strange" schematic that I attach.
The IC (Infineon's IL6150) is a monolitic LED driver that has an internal PWM generator driven by an analog or digital voltage applied to PIN 2.
View attachment 329477


The input pin has an internal pull-up circuit to high level if not connected externally on PCB. Icc,PWM current is approx. -18uA
View attachment 329478
Driving it via a 0 to 4.5V analog voltage changes the PWM according to this table:
View attachment 329479

So on the PCB there is a polarization circuit I have simulated in LTSpice here:

View attachment 329481
Two Common emitter NPN in series that should keep PIN2 IC voltage above 4.5V.
Note that this transistor has two internal series biasing resistor (R4,R5 and R6,R7) at the base and the emitter of 47k I needed to insert in the simulation otherwise they gave not the same voltages as measured.
Following logic, Q1 is on, in saturation mode, since V at nod R4,R2 is 4,5V so Q2 should be off.
No external polarization from the collector, so Q2 is off.
Vpin2 has been measured to be 8mV, no current flows out of Q2 collector, pin2 is held high by its internal circuitry.
So Why the heck did you need to implement this external biasing circuitry??
The designer should have something in mind I do not recognize, either because I am missing something or I am wrong in my consideration.
* First of all are my considerations right?

If the designer would have wanted to maybe change and keep at fixed PWM by changing the Vpin2 from 0 to 2.5V according to the datasheet and the PWM dutycycle, what kind of resistor should he have to change?
* Am I correct if I say, I need to turn on Q2 by letting Q1 return into linear mode?
Howto acheive the 0-2.5V voltage range?
Any suggestion howto make such a variable voltage 0-2,5 by a trimpot?
Best regards and thanks

What is the external circuitry intended to accomplish?

If nothing is connected to the PWM pin, then the pin will be pulled up to 4.7v internally, so LED PWM would be %100 duty cycle at a fixed freq 1.6 kHz. If you want to fix the duty cycle at some lower percentage, then do the math, and add a voltage dropping resistor from PWM to ground to drop the DC voltage to the desired level below 2.43v. You can do the same using a trimpot to make the duty cycle variable. The internal zener (probably 5.6v) at the PWM pin provides some over voltage protection as the device can be damaged if the PWM pin voltage exceeds 5.5v

At least thats how I think the pin works per the data sheet.

 

What is the external circuitry intended to accomplish?

If nothing is connected to the PWM pin, then the pin will be pulled up to 4.7v internally, so LED PWM would be %100 duty cycle at a fixed freq 1.6 kHz. If you want to fix the duty cycle at some lower percentage, then do the math, and add a voltage dropping resistor from PWM to ground to drop the DC voltage to the desired level below 2.43v. You can do the same using a trimpot to make the duty cycle variable. The internal zener (probably 5.6v) at the PWM pin provides some over voltage protection as the device can be damaged if the PWM pin voltage exceeds 5.5v

At least thats how I think the pin works per the data sheet.

There is still a great deal we do not know about this circuit and how it was intended to work. It is unusual to see a transistor circuit that is working from a sawtooth voltage source. Since this is a simulation component it might be interesting to know how the circuit is built on the actual board.

 

Maybe because your diode is not a Zener diode.
Q: What is the reason for making Vin a linear ramp from 0 to +12V and repeating that action?

I was simply investigating how the Q2 NPN was acting to see if it was going into different regions, but no, the NPN simply never turns on..
So Vin = Vs = 12V already

 

There is still a great deal we do not know about this circuit and how it was intended to work. It is unusual to see a transistor circuit that is working from a sawtooth voltage source. Since this is a simulation component it might be interesting to know how the circuit is built on the actual board.

Nope the transistor is powered by Vin voltage (in my case 12V). It is built in the way I have built a simulation.
Here You have the photo of the actual PCB

 

I was simply investigating how the Q2 NPN was acting to see if it was going into different regions, but no, the NPN simply never turns on..
So Vin = Vs = 12V already

I was able to make it turn ON so it appears to be possible. When it turns on it sets pin to almost GND which does not make much sense. So it looks like we are back to square #1
.

 

It is built in the way I have built a simulation.
Here You have the photo of the actual PCB

but it isn’t built the way you’ve simulated.
There are no 47k resistors.