Draw a block diagram of 32KX8 bit RAM memory using memory components 8KX8 bit and decoders DEC 3/8.

Attempt:
32KX8 b=2^(15)Bytes
8KX8 b=2^(13)Bytes
Total number of memory components is n=(32KX8)/(8KX8)=4.
Number of address lines of one memory component is 13 ( 8K=2^(13) ).

Here is an example of 128KX8 b RAM memory using memory components 8KX8 b and decoders DEC 3/8 (see attachment1).
Here we have 16 memory components and 13 address lines for each component. Here, each connector of every decoder is connected to one select line of each memory component (there are total 16 connectors and 16 memory components).

In the original question, there are total 32 decoder connectors, and 4 memory components.
I don't understand how to connect connectors of decoders to memory components.
How many connections are needed?

Here is my diagram without decoders - memory components connections (see attachment2).
Here is my diagram with decoders - memory components connections (see attachment3).

Note: I didn't draw address lines of memory components.

Is diagram in attachment3 correct?
If not, what should be correct connections between decoders connectors and selective lines of memory components?

 

Draw a block diagram of 32KX8 bit RAM memory using memory components 8KX8 bit and decoders DEC 3/8.

hi,
Is this above the original assignment question.??

Does the question specify the number of Address lines.??

Here is an example of 128KX8 b RAM memory using memory components 8KX8 b and decoders DEC 3/8 (see attachment1).

Please post your Truth Table for the Address line decoding.

E

 

@ericgibbs,

Yes, it is the original question.
The question doesn't specify the number of address lines, it can be evaluated from given data.
I don't know how to evaluate the truth table.

 

hi uu,
OK.
I guess you know that Address lines A0 thru A12 will be connected to all of the four 8K * 8 RAM I/C's.

If you assume that the RAM memory is located at the Top of a possible 64k of ROM/RAM space, that means a total of 16 Address lines. ie: A0 thru A15.

So you decode the highest three address lines A15,A14,A13 so that they select only one of the four 8K RAM's for all states of the these 3 Address line/

Do you follow that OK.?

E

EDIT:
Look at this 3 to 8 decoder IC PDF for guidance.

 

I am mainly confused how to connect connectors from decoders to memory components.
What is wrong with those connections in attachment3?

 

hi,
On Att#3, the middle 4 Decoders are redundant.
They have the same Address line inputs, but only one select output pin is used.?
E

 

Could you show the correct diagram?

 

Look at the image I have added in post #6.

 

But shouldn't we also have 4 additional decoders (in your diagram) because we have memory 32=8x4?

 

I am trying to help you without giving you the answer, as this a homework assignment.

Look at this image of the Function Table I have edited.

Assume that the total memory area is 64k and the RAM part is in the high part of the memory space.

 

This is actually a coursework - I am preparing for exam.

 

How many 3 to 8 decoders do we need to have eight outputs? Answer before looking below If you sneak a peak before you have an answer, you have missed a learning opportunity!

Spoiler

Do we need at least 8 or 9 decoders? Or does the function of one 3 to 8 decoder transform three bits to eight outputs, depending on the value of the input. Three - not eight or nine.

Then, the next question is the following. How many 3 to 8 decoders do we need to have four outputs?

You have previously answered my next question. How many address lines does it take to decode 8k? Thirteen bits.

Then, you have 4 - 8k modules, How do you determine which one to access?

Spoiler

If your address is 16 bits long, what do you do with the other three bits?

If you did not cheat and answered the last question, another one might arise... What might that question be?

Spoiler

If you have followed thus far, you should have noticed that in a 16 bit address, you have one unused bit (A15).. What do you do with it?

 

What if instead of prefix K (Kibi), we have prefix k (kilo)?
How many address lines we would have?
The number 8000 is not the power of two.
We had 8K=2^(13) so there was 13 address lines per memory component.

 

hi uu,
It is a Binary counting system, we say 8K when it should actually be 8192 Bytes. It easier to say 8K [8000 bytes]
So A0 thru A15 [ 16 lines ] will be 65535 Bytes.

15 Address lines = 32767
14 = 16383
13 = 8191

E

 

@ericgibbs , you chart might be a little misleading. Most of us realise that 13 does not equal 8191. But I am not sure exactly what you mean. Are you implying that you can have 8191 values in 13 bits? Are you implying that 2^13 = 8191? I have an idea of what you meant but dont want to speak for you.

 

@ericgibbs , you chart might be a little misleading. Most of us realise that 13 does not equal 8191. But I am not sure exactly what you mean. Are you implying that you can have 8191 values in 13 bits? Are you implying that 2^13 = 8191? I have an idea of what you meant but dont want to speak for you.

hi dj,
This can be misleading, but the OP has to realise that Zero [0] is a value, so there are 8192 possible addressed values, when including address zero .

As you know 8191 is 1FFF in Hex, which is the upper boundary [top] address of a 8K * 8 RAM area memory map.

8192 = 2000 Hex which is the start address of the next 8K* 8 ROM area.

Is this what you are querying.?

Eric

 

hi uu,
Does this diagram help you to understand the decoding required.?
Ignore the IC pin numbers

E