Big voltage drop through buffer?

Thread Starter

MikeJacobs

Joined Dec 7, 2019
94
I am seeing 3.7v out of a 5v vcc buffer

is that normal?
I need a 1 to 1 or very close
Using the buffer to source some current
What am I missing? Thanks
 

MrChips

Joined Oct 2, 2009
19,768
You have to tell us a lot more.
What is the part number of the buffer?
What is the load on the output of the buffer?
 

MrChips

Joined Oct 2, 2009
19,768
Where did you get this 74LS376?
I have been in this business for a very loooong time and I have never seen a 74LS376.
SN74376 is a Quadruple J-K Flip-flop. Definitely not a buffer.

You will not get 5V output from a TTL gate. You need to switch to a CMOS gate.
 

Papabravo

Joined Feb 24, 2006
12,702
So then 3.7 V with VCC of 5 V is normal for an 'ls output.
If you read the LS datasheet carefully you will find that an 'output' can sink a reasonable amount of current, like 24 mA if memory serves me, but the LS output can only source a small fraction of that. As a result the datasheet specifies that the minimum Voh will be something like 2.4 Volts minimum and 3.1 Volts typical. So you are only dropping to 3.7 which means whatever the output is connected is not dragging it down too badly. If you want something closer to the rail you need a device with a CMOS output buffer.
 

SteveSh

Joined Nov 5, 2019
104
Where did you get this 74LS376?
I have been in this business for a very loooong time and I have never seen a 74LS376.
SN74376 is a Quadruple J-K Flip-flop. Definitely not a buffer.
74ls367
If you read the LS datasheet carefully you will find that an 'output' can sink a reasonable amount of current, like 24 mA if memory serves me, but the LS output can only source a small fraction of that. As a result the datasheet specifies that the minimum Voh will be something like 2.4 Volts. So you are only dropping to 3.7 which means what ever the output is connected is no dragging it down too badly. If you want something closer to the rail you need a device with a CMOS output buffer.
Yes. The OP said the output was basically unloaded - just a 'scope probe. That's why I said 3.7 V was reasonable.
 

Thread Starter

MikeJacobs

Joined Dec 7, 2019
94
I read the data sheet but apparently incorrectly
Can someone tell me where it shows 3.7 volt
Out? the abbreviations the manufactures use are not always understood by the novice
 

Papabravo

Joined Feb 24, 2006
12,702
I read the data sheet but apparently incorrectly
Can someone tell me where it shows 3.7 volt
Out? the abbreviations the manufactures use are not always understood by the novice
The data sheet won't say 3.7 volts because the output is not loaded in a way that matches the conditions specified in the datasheet.
Which are:
  1. Vcc = MIN
  2. Vih = 2V
  3. Vil = 0.8V
  4. Ioh = MAX = -5.2 mA
Look for the parameter called Voh, that is the voltage with the output high. In the datasheet from TI this parameter for the 74LS367 says the minimum value is 2.4 Volts, the typical value is 3.1 Volts. You can think of these numbers as two points on a bell curve for a normally distributed random variable with a mean (typical) value of 3.1 Volts and a standard deviation (σ) of (3.1-2.4)/3 or 0.7 Volts. This implies that 99% of all the devices you will ever see, will have an output high in the range {2.4,...,Vcc}
 
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Papabravo

Joined Feb 24, 2006
12,702
So why does CMOS have a higher voltage?
It has a higher output voltage because the output stage has a complementary pair of transistors. One is an NMOS FET and the other is a PMOS FET. These transistors can source as much as they can sink. If you look at the structure of a TTL totrm pole output you can see the problem. The output stage is not symmetrical and can sink way more current than it can source. In the early days of TTL (ca. 1966-1972) this was not much of a problem because all TTL inputs were the emitters of multi-emitter transistors (current sources) and there was no need for a high output to source current. That is why using a pulldown resistor on a TTL gate is a really really BAD idea. Pulldown resistors on a CMOS gate -- NO PROBLEM, because the gate of a MOSFET does not source current.
 

Thread Starter

MikeJacobs

Joined Dec 7, 2019
94
So what’s a good cmos part for both inverting and non inverting ?
preferrably multi gates per chip that can source say 15 mA per gate at 5v?
 

Papabravo

Joined Feb 24, 2006
12,702
So what’s a good cmos part for both inverting and non inverting ?
preferrably multi gates per chip that can source say 15 mA per gate at 5v?
So you can start by replacing the LS in a part number with an HC or an HCT. For example if you have a 74LS367 and you would like a CMOS alternative that has TTL compatible inputs you ask for a 74HCT367
http://www.ti.com/lit/ds/symlink/cd74hct367.pdf

It really is just that easy. But 15 mA will be a heavy lift.

The next alternative to try is AHC or AHCT
74AHCT367
http://www.ti.com/lit/ds/symlink/sn74ahct367.pdf
You are still going to max out at 8 mA and lose maybe 0.5 volts

I dunno, I guess you keep looking.
 
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Thread Starter

MikeJacobs

Joined Dec 7, 2019
94
So you can start by replacing the LS in a part number with an HC or an HCT. For example if you have a 74LS367 and you would like a CMOS alternative that has TTL compatible inputs you ask for a 74HCT367
http://www.ti.com/lit/ds/symlink/cd74hct367.pdf

It really is just that easy. But 15 mA will be a heavy lift.

The next alternative to try is AHC or AHCT
74AHCT367
http://www.ti.com/lit/ds/symlink/sn74ahct367.pdf
You are still going to max out at 8 mA and lose maybe 0.5 volts

I dunno, I guess you keep looking.
so with a part like that I don’t see a max current out
Or Ioh ??
How do I know that number
 

Papabravo

Joined Feb 24, 2006
12,702
so with a part like that I don’t see a max current out
Or Ioh ??
How do I know that number
They are in the datasheet. You will find both Ioh, Current Out with output high, and Iol, Current Out with output low. Iol should have a positive sign and Ioh usually has a negative sign to indicate that is sourcing current.
 

AnalogKid

Joined Aug 1, 2013
8,227
19 posts and still no schematic. No power supply conditions or conditioning, no treatment of unused inputs, no signal source conditions, no output load parameters ...

ak
 
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