There is a protocole over serial port as following:
1. no signal (idle) is High (+5V).
2. reset signal is a 60 us Low (0v) pulse.
3. data signal is : 250 kbps/8 bits/2 stop/no parity
I want to detect reset signal using Frame Error capability of MCU (ATmega328p)
250 kbps so 1 bit is 4us,
serial packet is 11 bit = 44 us
the farme format is = start-b0-b1-b2-b3-b4-b5-b6-b7-stop1-stop2
for normal data = 0-x-x-x-x-x-x-x-x-1-1
for reset pulse = 0-0-0-0-0-0-0-0-0-0-0-0-0-0-0
According page 245 of the data sheet, if 1st Stop bit of RX data is zero, FE0 (bit4) of UCSR0A register is set by MCU
But it does not occur for me!
please explain why frame error does not occur?
please do not offer alternative methods to detect reset signal!
I am just curious why Frame Error does not occur, whilst the datasheet says it occures!
1. no signal (idle) is High (+5V).
2. reset signal is a 60 us Low (0v) pulse.
3. data signal is : 250 kbps/8 bits/2 stop/no parity
I want to detect reset signal using Frame Error capability of MCU (ATmega328p)
250 kbps so 1 bit is 4us,
serial packet is 11 bit = 44 us
the farme format is = start-b0-b1-b2-b3-b4-b5-b6-b7-stop1-stop2
for normal data = 0-x-x-x-x-x-x-x-x-1-1
for reset pulse = 0-0-0-0-0-0-0-0-0-0-0-0-0-0-0
According page 245 of the data sheet, if 1st Stop bit of RX data is zero, FE0 (bit4) of UCSR0A register is set by MCU
But it does not occur for me!
please explain why frame error does not occur?
please do not offer alternative methods to detect reset signal!
I am just curious why Frame Error does not occur, whilst the datasheet says it occures!