Hi. I have the following layout where U1 is a IR2101 gate driver and I've highlighted the connection to the lower FET's gate. Now you can see that if I ditched the resistor highlighted then the connection would be ~2mm. My understanding is that gate resistors can reduce EMI by slowing dV/dt, and they reduce ringing and thus overshoot by lowering the Q of Cgate-Ltrack. However you can see that if I remove the resistor then Ltrack will be negligible, and I believe that U1 will handle the increased power dissipation, and I can improve the decoupling to mitigate the EMI.
Is this acceptable or am I creating problems for myself?

Is this acceptable or am I creating problems for myself?
